| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * Copyright (c) 2005 Jakub Vana
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @addtogroup ia64interrupt
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| 31 | * @{
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| 32 | */
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| 33 | /** @file
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| 34 | */
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| 35 |
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| 36 | #include <arch/interrupt.h>
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| 37 | #include <interrupt.h>
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| 38 | #include <ddi/irq.h>
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| 39 | #include <panic.h>
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| 40 | #include <print.h>
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| 41 | #include <debug.h>
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| 42 | #include <console/console.h>
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| 43 | #include <typedefs.h>
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| 44 | #include <arch/asm.h>
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| 45 | #include <arch/barrier.h>
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| 46 | #include <arch/register.h>
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| 47 | #include <arch.h>
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| 48 | #include <syscall/syscall.h>
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| 49 | #include <print.h>
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| 50 | #include <proc/scheduler.h>
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| 51 | #include <ipc/sysipc.h>
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| 52 | #include <ipc/irq.h>
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| 53 | #include <ipc/ipc.h>
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| 54 | #include <synch/spinlock.h>
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| 55 | #include <mm/tlb.h>
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| 56 | #include <symtab.h>
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| 57 | #include <putchar.h>
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| 58 |
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| 59 | #define VECTORS_64_BUNDLE 20
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| 60 | #define VECTORS_16_BUNDLE 48
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| 61 | #define VECTORS_16_BUNDLE_START 0x5000
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| 62 |
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| 63 | #define VECTOR_MAX 0x7f00
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| 64 |
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| 65 | #define BUNDLE_SIZE 16
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| 66 |
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| 67 | static const char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
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| 68 | "VHPT Translation vector",
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| 69 | "Instruction TLB vector",
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| 70 | "Data TLB vector",
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| 71 | "Alternate Instruction TLB vector",
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| 72 | "Alternate Data TLB vector",
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| 73 | "Data Nested TLB vector",
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| 74 | "Instruction Key Miss vector",
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| 75 | "Data Key Miss vector",
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| 76 | "Dirty-Bit vector",
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| 77 | "Instruction Access-Bit vector",
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| 78 | "Data Access-Bit vector"
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| 79 | "Break Instruction vector",
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| 80 | "External Interrupt vector"
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| 81 | "Reserved",
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| 82 | "Reserved",
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| 83 | "Reserved",
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| 84 | "Reserved",
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| 85 | "Reserved",
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| 86 | "Reserved",
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| 87 | "Reserved"
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| 88 | };
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| 89 |
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| 90 | static const char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
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| 91 | "Page Not Present vector",
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| 92 | "Key Permission vector",
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| 93 | "Instruction Access rights vector",
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| 94 | "Data Access Rights vector",
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| 95 | "General Exception vector",
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| 96 | "Disabled FP-Register vector",
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| 97 | "NaT Consumption vector",
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| 98 | "Speculation vector",
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| 99 | "Reserved",
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| 100 | "Debug vector",
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| 101 | "Unaligned Reference vector",
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| 102 | "Unsupported Data Reference vector",
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| 103 | "Floating-point Fault vector",
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| 104 | "Floating-point Trap vector",
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| 105 | "Lower-Privilege Transfer Trap vector",
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| 106 | "Taken Branch Trap vector",
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| 107 | "Single Step Trap vector",
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| 108 | "Reserved",
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| 109 | "Reserved",
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| 110 | "Reserved",
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| 111 | "Reserved",
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| 112 | "Reserved",
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| 113 | "Reserved",
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| 114 | "Reserved",
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| 115 | "Reserved",
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| 116 | "IA-32 Exception vector",
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| 117 | "IA-32 Intercept vector",
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| 118 | "IA-32 Interrupt vector",
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| 119 | "Reserved",
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| 120 | "Reserved",
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| 121 | "Reserved"
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| 122 | };
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| 123 |
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| 124 | static const char *vector_to_string(uint16_t vector)
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| 125 | {
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| 126 | ASSERT(vector <= VECTOR_MAX);
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| 127 |
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| 128 | if (vector >= VECTORS_16_BUNDLE_START)
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| 129 | return vector_names_16_bundle[(vector -
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| 130 | VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];
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| 131 | else
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| 132 | return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];
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| 133 | }
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| 134 |
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| 135 | static void dump_interrupted_context(istate_t *istate)
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| 136 | {
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| 137 | putchar('\n');
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| 138 | printf("Interrupted context dump:\n");
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| 139 | printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
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| 140 | istate->ar_bspstore);
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| 141 | printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
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| 142 | istate->ar_rsc);
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| 143 | printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
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| 144 | istate->ar_pfs);
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| 145 | printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
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| 146 | istate->cr_ipsr);
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| 147 |
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| 148 | printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei,
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| 149 | symtab_fmt_name_lookup(istate->cr_iip));
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| 150 | printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa,
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| 151 | symtab_fmt_name_lookup(istate->cr_iipa));
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| 152 | printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa,
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| 153 | symtab_fmt_name_lookup(istate->cr_ifa));
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| 154 | }
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| 155 |
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| 156 | void general_exception(uint64_t vector, istate_t *istate)
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| 157 | {
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| 158 | const char *desc;
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| 159 |
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| 160 | switch (istate->cr_isr.ge_code) {
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| 161 | case GE_ILLEGALOP:
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| 162 | desc = "Illegal Operation fault";
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| 163 | break;
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| 164 | case GE_PRIVOP:
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| 165 | desc = "Privileged Operation fault";
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| 166 | break;
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| 167 | case GE_PRIVREG:
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| 168 | desc = "Privileged Register fault";
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| 169 | break;
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| 170 | case GE_RESREGFLD:
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| 171 | desc = "Reserved Register/Field fault";
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| 172 | break;
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| 173 | case GE_DISBLDISTRAN:
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| 174 | desc = "Disabled Instruction Set Transition fault";
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| 175 | break;
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| 176 | case GE_ILLEGALDEP:
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| 177 | desc = "Illegal Dependency fault";
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| 178 | break;
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| 179 | default:
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| 180 | desc = "unknown";
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| 181 | break;
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| 182 | }
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| 183 |
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| 184 | fault_if_from_uspace(istate, "General Exception (%s).", desc);
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| 185 |
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| 186 | dump_interrupted_context(istate);
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| 187 | panic("General Exception (%s).", desc);
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| 188 | }
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| 189 |
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| 190 | void disabled_fp_register(uint64_t vector, istate_t *istate)
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| 191 | {
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| 192 | #ifdef CONFIG_FPU_LAZY
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| 193 | scheduler_fpu_lazy_request();
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| 194 | #else
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| 195 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
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| 196 | (uint16_t) vector, vector_to_string(vector));
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| 197 | dump_interrupted_context(istate);
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| 198 | panic("Interruption: %#hx (%s).", (uint16_t) vector,
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| 199 | vector_to_string(vector));
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| 200 | #endif
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| 201 | }
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| 202 |
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| 203 | void nop_handler(uint64_t vector, istate_t *istate)
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| 204 | {
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| 205 | }
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| 206 |
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| 207 | /** Handle syscall. */
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| 208 | int break_instruction(uint64_t vector, istate_t *istate)
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| 209 | {
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| 210 | /*
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| 211 | * Move to next instruction after BREAK.
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| 212 | */
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| 213 | if (istate->cr_ipsr.ri == 2) {
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| 214 | istate->cr_ipsr.ri = 0;
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| 215 | istate->cr_iip += 16;
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| 216 | } else {
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| 217 | istate->cr_ipsr.ri++;
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| 218 | }
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| 219 |
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| 220 | return syscall_handler(istate->in0, istate->in1, istate->in2,
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| 221 | istate->in3, istate->in4, istate->in5, istate->in6);
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| 222 | }
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| 223 |
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| 224 | void universal_handler(uint64_t vector, istate_t *istate)
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| 225 | {
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| 226 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
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| 227 | (uint16_t) vector, vector_to_string(vector));
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| 228 | dump_interrupted_context(istate);
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| 229 | panic("Interruption: %#hx (%s).", (uint16_t) vector,
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| 230 | vector_to_string(vector));
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| 231 | }
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| 232 |
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| 233 | static void end_of_local_irq(void)
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| 234 | {
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| 235 | asm volatile (
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| 236 | "mov cr.eoi=r0;;"
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| 237 | );
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| 238 | }
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| 239 |
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| 240 | void external_interrupt(uint64_t vector, istate_t *istate)
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| 241 | {
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| 242 | cr_ivr_t ivr;
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| 243 |
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| 244 | ivr.value = ivr_read();
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| 245 | srlz_d();
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| 246 |
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| 247 | irq_t *irq;
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| 248 |
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| 249 | switch (ivr.vector) {
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| 250 | case INTERRUPT_SPURIOUS:
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| 251 | #ifdef CONFIG_DEBUG
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| 252 | printf("cpu%d: spurious interrupt\n", CPU->id);
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| 253 | #endif
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| 254 | break;
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| 255 |
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| 256 | #ifdef CONFIG_SMP
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| 257 | case VECTOR_TLB_SHOOTDOWN_IPI:
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| 258 | tlb_shootdown_ipi_recv();
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| 259 | end_of_local_irq();
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| 260 | break;
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| 261 | #endif
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| 262 |
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| 263 | case INTERRUPT_TIMER:
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| 264 | irq = irq_dispatch_and_lock(ivr.vector);
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| 265 | if (irq) {
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| 266 | irq->handler(irq);
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| 267 | irq_spinlock_unlock(&irq->lock, false);
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| 268 | } else {
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| 269 | panic("Unhandled Internal Timer Interrupt (%d).",
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| 270 | ivr.vector);
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| 271 | }
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| 272 | break;
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| 273 | default:
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| 274 | irq = irq_dispatch_and_lock(ivr.vector);
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| 275 | if (irq) {
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| 276 | /*
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| 277 | * The IRQ handler was found.
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| 278 | */
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| 279 | if (irq->preack) {
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| 280 | /* Send EOI before processing the interrupt */
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| 281 | end_of_local_irq();
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| 282 | }
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| 283 | irq->handler(irq);
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| 284 | if (!irq->preack)
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| 285 | end_of_local_irq();
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| 286 | irq_spinlock_unlock(&irq->lock, false);
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| 287 | } else {
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| 288 | /*
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| 289 | * Unhandled interrupt.
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| 290 | */
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| 291 | end_of_local_irq();
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| 292 | #ifdef CONFIG_DEBUG
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| 293 | printf("\nUnhandled External Interrupt Vector %d\n",
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| 294 | ivr.vector);
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| 295 | #endif
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| 296 | }
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| 297 | break;
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| 298 | }
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| 299 | }
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| 300 |
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| 301 | void trap_virtual_enable_irqs(uint16_t irqmask)
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| 302 | {
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| 303 | }
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| 304 |
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| 305 | /** @}
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| 306 | */
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