| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * Copyright (c) 2005 Jakub Vana
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @addtogroup kernel_ia64_interrupt
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| 31 | * @{
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| 32 | */
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| 33 | /** @file
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| 34 | */
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| 35 |
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| 36 | #include <arch/interrupt.h>
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| 37 | #include <assert.h>
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| 38 | #include <interrupt.h>
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| 39 | #include <ddi/irq.h>
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| 40 | #include <panic.h>
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| 41 | #include <stdio.h>
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| 42 | #include <console/console.h>
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| 43 | #include <typedefs.h>
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| 44 | #include <arch/asm.h>
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| 45 | #include <barrier.h>
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| 46 | #include <arch/register.h>
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| 47 | #include <arch.h>
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| 48 | #include <syscall/syscall.h>
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| 49 | #include <proc/scheduler.h>
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| 50 | #include <ipc/sysipc.h>
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| 51 | #include <ipc/irq.h>
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| 52 | #include <ipc/ipc.h>
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| 53 | #include <synch/spinlock.h>
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| 54 | #include <mm/tlb.h>
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| 55 | #include <arch/mm/tlb.h>
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| 56 | #include <symtab.h>
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| 57 |
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| 58 | #define VECTORS_64_BUNDLE 20
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| 59 | #define VECTORS_16_BUNDLE 48
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| 60 | #define VECTORS_16_BUNDLE_START 0x50
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| 61 |
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| 62 | #define VECTOR_MAX 0x7f
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| 63 |
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| 64 | static const char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
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| 65 | "VHPT Translation vector",
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| 66 | "Instruction TLB vector",
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| 67 | "Data TLB vector",
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| 68 | "Alternate Instruction TLB vector",
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| 69 | "Alternate Data TLB vector",
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| 70 | "Data Nested TLB vector",
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| 71 | "Instruction Key Miss vector",
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| 72 | "Data Key Miss vector",
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| 73 | "Dirty-Bit vector",
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| 74 | "Instruction Access-Bit vector",
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| 75 | "Data Access-Bit vector",
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| 76 | "Break Instruction vector",
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| 77 | "External Interrupt vector",
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| 78 | "Virtual External Interrupt vector",
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| 79 | "Reserved",
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| 80 | "Reserved",
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| 81 | "Reserved",
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| 82 | "Reserved",
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| 83 | "Reserved",
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| 84 | "Reserved"
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| 85 | };
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| 86 |
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| 87 | static const char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
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| 88 | "Page Not Present vector",
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| 89 | "Key Permission vector",
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| 90 | "Instruction Access rights vector",
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| 91 | "Data Access Rights vector",
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| 92 | "General Exception vector",
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| 93 | "Disabled FP-Register vector",
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| 94 | "NaT Consumption vector",
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| 95 | "Speculation vector",
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| 96 | "Reserved",
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| 97 | "Debug vector",
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| 98 | "Unaligned Reference vector",
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| 99 | "Unsupported Data Reference vector",
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| 100 | "Floating-point Fault vector",
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| 101 | "Floating-point Trap vector",
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| 102 | "Lower-Privilege Transfer Trap vector",
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| 103 | "Taken Branch Trap vector",
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| 104 | "Single Step Trap vector",
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| 105 | "Reserved",
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| 106 | "Reserved",
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| 107 | "Reserved",
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| 108 | "Reserved",
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| 109 | "Reserved",
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| 110 | "Reserved",
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| 111 | "Reserved",
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| 112 | "Reserved",
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| 113 | "IA-32 Exception vector",
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| 114 | "IA-32 Intercept vector",
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| 115 | "IA-32 Interrupt vector",
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| 116 | "Reserved",
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| 117 | "Reserved",
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| 118 | "Reserved"
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| 119 | };
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| 120 |
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| 121 | static const char *vector_to_string(unsigned int n)
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| 122 | {
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| 123 | assert(n <= VECTOR_MAX);
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| 124 |
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| 125 | if (n >= VECTORS_16_BUNDLE_START)
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| 126 | return vector_names_16_bundle[n - VECTORS_16_BUNDLE_START];
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| 127 | else
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| 128 | return vector_names_64_bundle[n / 4];
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| 129 | }
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| 130 |
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| 131 | void istate_decode(istate_t *istate)
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| 132 | {
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| 133 | printf("ar.bsp=%p\tar.bspstore=%p\n",
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| 134 | (void *) istate->ar_bsp, (void *) istate->ar_bspstore);
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| 135 | printf("ar.rnat=%#0" PRIx64 "\tar.rsc=%#0" PRIx64 "\n",
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| 136 | istate->ar_rnat, istate->ar_rsc);
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| 137 | printf("ar.ifs=%#0" PRIx64 "\tar.pfs=%#0" PRIx64 "\n",
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| 138 | istate->ar_ifs, istate->ar_pfs);
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| 139 | printf("cr.isr=%#0" PRIx64 "\tcr.ipsr=%#0" PRIx64 "\n",
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| 140 | istate->cr_isr.value, istate->cr_ipsr.value);
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| 141 |
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| 142 | printf("cr.iip=%#0" PRIxPTR ", #%u\t(%s)\n",
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| 143 | istate->cr_iip, istate->cr_isr.ei,
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| 144 | symtab_fmt_name_lookup(istate->cr_iip));
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| 145 | printf("cr.iipa=%#0" PRIxPTR "\t(%s)\n", istate->cr_iipa,
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| 146 | symtab_fmt_name_lookup(istate->cr_iipa));
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| 147 | printf("cr.ifa=%#0" PRIxPTR "\t(%s)\n", istate->cr_ifa,
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| 148 | symtab_fmt_name_lookup(istate->cr_ifa));
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| 149 | }
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| 150 |
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| 151 | void general_exception(unsigned int n, istate_t *istate)
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| 152 | {
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| 153 | const char *desc;
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| 154 |
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| 155 | switch (istate->cr_isr.ge_code) {
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| 156 | case GE_ILLEGALOP:
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| 157 | desc = "Illegal Operation fault";
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| 158 | break;
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| 159 | case GE_PRIVOP:
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| 160 | desc = "Privileged Operation fault";
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| 161 | break;
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| 162 | case GE_PRIVREG:
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| 163 | desc = "Privileged Register fault";
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| 164 | break;
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| 165 | case GE_RESREGFLD:
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| 166 | desc = "Reserved Register/Field fault";
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| 167 | break;
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| 168 | case GE_DISBLDISTRAN:
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| 169 | desc = "Disabled Instruction Set Transition fault";
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| 170 | break;
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| 171 | case GE_ILLEGALDEP:
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| 172 | desc = "Illegal Dependency fault";
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| 173 | break;
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| 174 | default:
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| 175 | desc = "unknown";
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| 176 | break;
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| 177 | }
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| 178 |
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| 179 | fault_if_from_uspace(istate, "General Exception (%s).", desc);
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| 180 | panic_badtrap(istate, n, "General Exception (%s).", desc);
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| 181 | }
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| 182 |
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| 183 | void disabled_fp_register(unsigned int n, istate_t *istate)
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| 184 | {
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| 185 | #ifdef CONFIG_FPU_LAZY
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| 186 | scheduler_fpu_lazy_request();
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| 187 | #else
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| 188 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
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| 189 | (uint16_t) n, vector_to_string(n));
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| 190 | panic_badtrap(istate, n, "Interruption: %#hx (%s).",
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| 191 | (uint16_t) n, vector_to_string(n));
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| 192 | #endif
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| 193 | }
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| 194 |
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| 195 | #define BREAK_IMM_SYSCALL 0x40000U
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| 196 |
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| 197 | /** Handle syscall. */
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| 198 | sysarg_t break_instruction(unsigned int n, istate_t *istate)
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| 199 | {
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| 200 | sysarg_t ret;
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| 201 |
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| 202 | if (istate->cr_iim != BREAK_IMM_SYSCALL) {
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| 203 | fault_if_from_uspace(istate, "Unknown software interrupt: %x",
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| 204 | (uint32_t) istate->cr_iim);
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| 205 | panic_badtrap(istate, n, "Interruption: %#hx (%s).",
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| 206 | (uint16_t) n, vector_to_string(n));
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| 207 | }
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| 208 |
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| 209 | /*
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| 210 | * Move to next instruction after BREAK.
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| 211 | */
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| 212 | if (istate->cr_ipsr.ri == 2) {
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| 213 | istate->cr_ipsr.ri = 0;
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| 214 | istate->cr_iip += 16;
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| 215 | } else {
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| 216 | istate->cr_ipsr.ri++;
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| 217 | }
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| 218 |
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| 219 | interrupts_enable();
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| 220 | ret = syscall_handler(istate->in0, istate->in1, istate->in2,
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| 221 | istate->in3, istate->in4, istate->in5, istate->in6);
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| 222 | interrupts_disable();
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| 223 |
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| 224 | return ret;
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| 225 | }
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| 226 |
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| 227 | void universal_handler(unsigned int n, istate_t *istate)
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| 228 | {
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| 229 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
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| 230 | n, vector_to_string(n));
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| 231 | panic_badtrap(istate, n, "Interruption: %#hx (%s).",
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| 232 | n, vector_to_string(n));
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| 233 | }
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| 234 |
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| 235 | static void end_of_local_irq(void)
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| 236 | {
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| 237 | asm volatile (
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| 238 | "mov cr.eoi = r0 ;;"
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| 239 | );
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| 240 | }
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| 241 |
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| 242 | void external_interrupt(unsigned int n, istate_t *istate)
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| 243 | {
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| 244 | cr_ivr_t ivr;
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| 245 |
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| 246 | ivr.value = ivr_read();
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| 247 | srlz_d();
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| 248 |
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| 249 | irq_t *irq;
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| 250 |
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| 251 | switch (ivr.vector) {
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| 252 | case INTERRUPT_SPURIOUS:
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| 253 | #ifdef CONFIG_DEBUG
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| 254 | printf("cpu%d: spurious interrupt\n", CPU->id);
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| 255 | #endif
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| 256 | break;
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| 257 |
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| 258 | #ifdef CONFIG_SMP
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| 259 | case VECTOR_TLB_SHOOTDOWN_IPI:
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| 260 | tlb_shootdown_ipi_recv();
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| 261 | end_of_local_irq();
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| 262 | break;
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| 263 | #endif
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| 264 |
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| 265 | case INTERRUPT_TIMER:
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| 266 | irq = irq_dispatch_and_lock(ivr.vector);
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| 267 | if (irq) {
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| 268 | irq->handler(irq);
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| 269 | irq_spinlock_unlock(&irq->lock, false);
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| 270 | } else {
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| 271 | panic("Unhandled Internal Timer Interrupt (%d).",
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| 272 | ivr.vector);
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| 273 | }
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| 274 | break;
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| 275 | default:
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| 276 | irq = irq_dispatch_and_lock(ivr.vector);
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| 277 | if (irq) {
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| 278 | /*
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| 279 | * The IRQ handler was found.
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| 280 | */
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| 281 | if (irq->preack) {
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| 282 | /* Send EOI before processing the interrupt */
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| 283 | end_of_local_irq();
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| 284 | }
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| 285 | irq->handler(irq);
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| 286 | if (!irq->preack)
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| 287 | end_of_local_irq();
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| 288 | irq_spinlock_unlock(&irq->lock, false);
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| 289 | } else {
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| 290 | /*
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| 291 | * Unhandled interrupt.
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| 292 | */
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| 293 | end_of_local_irq();
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| 294 | #ifdef CONFIG_DEBUG
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| 295 | printf("\nUnhandled External Interrupt Vector %d\n",
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| 296 | ivr.vector);
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| 297 | #endif
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| 298 | }
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| 299 | break;
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| 300 | }
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| 301 | }
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| 302 |
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| 303 | void trap_virtual_enable_irqs(uint16_t irqmask)
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| 304 | {
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| 305 | }
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| 306 |
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| 307 | void exception_init(void)
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| 308 | {
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| 309 | unsigned int i;
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| 310 |
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| 311 | for (i = 0; i < IVT_ITEMS; i++)
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| 312 | exc_register(i, "universal_handler", false, universal_handler);
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| 313 |
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| 314 | exc_register(EXC_ALT_ITLB_FAULT,
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| 315 | vector_to_string(EXC_ALT_ITLB_FAULT), true,
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| 316 | alternate_instruction_tlb_fault);
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| 317 | exc_register(EXC_ALT_DTLB_FAULT,
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| 318 | vector_to_string(EXC_ALT_DTLB_FAULT), true,
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| 319 | alternate_data_tlb_fault);
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| 320 | exc_register(EXC_NESTED_TLB_FAULT,
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| 321 | vector_to_string(EXC_NESTED_TLB_FAULT), false,
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| 322 | data_nested_tlb_fault);
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| 323 | exc_register(EXC_DATA_D_BIT_FAULT,
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| 324 | vector_to_string(EXC_DATA_D_BIT_FAULT), true,
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| 325 | data_dirty_bit_fault);
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| 326 | exc_register(EXC_INST_A_BIT_FAULT,
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| 327 | vector_to_string(EXC_INST_A_BIT_FAULT), true,
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| 328 | instruction_access_bit_fault);
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| 329 | exc_register(EXC_DATA_A_BIT_FAULT,
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| 330 | vector_to_string(EXC_DATA_A_BIT_FAULT), true,
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| 331 | data_access_bit_fault);
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| 332 | exc_register(EXC_EXT_INTERRUPT,
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| 333 | vector_to_string(EXC_EXT_INTERRUPT), true,
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| 334 | external_interrupt);
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| 335 |
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| 336 | exc_register(EXC_PAGE_NOT_PRESENT,
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| 337 | vector_to_string(EXC_PAGE_NOT_PRESENT), true,
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| 338 | page_not_present);
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| 339 | exc_register(EXC_DATA_AR_FAULT,
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| 340 | vector_to_string(EXC_DATA_AR_FAULT), true,
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| 341 | data_access_rights_fault);
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| 342 | exc_register(EXC_GENERAL_EXCEPTION,
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| 343 | vector_to_string(EXC_GENERAL_EXCEPTION), false,
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| 344 | general_exception);
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| 345 | exc_register(EXC_DISABLED_FP_REG,
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| 346 | vector_to_string(EXC_DISABLED_FP_REG), true,
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| 347 | disabled_fp_register);
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| 348 | }
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| 349 |
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| 350 | /** @}
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| 351 | */
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