source: mainline/kernel/arch/ia64/src/ia64.c@ ef5de6d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ef5de6d was ef5de6d, checked in by Jakub Jermar <jakub@…>, 17 years ago

Remove most of the ia64 dead / commented out code.
  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/ski/ski.h>
37#include <arch/drivers/it.h>
38#include <arch/interrupt.h>
39#include <arch/barrier.h>
40#include <arch/asm.h>
41#include <arch/register.h>
42#include <arch/types.h>
43#include <arch/context.h>
44#include <arch/stack.h>
45#include <arch/mm/page.h>
46#include <mm/as.h>
47#include <config.h>
48#include <userspace.h>
49#include <console/console.h>
50#include <proc/uarg.h>
51#include <syscall/syscall.h>
52#include <ddi/irq.h>
53#include <ddi/device.h>
54#include <arch/drivers/ega.h>
55#include <arch/bootinfo.h>
56#include <genarch/kbd/i8042.h>
57#include <genarch/kbd/ns16550.h>
58#include <smp/smp.h>
59#include <smp/ipi.h>
60#include <arch/atomic.h>
61#include <panic.h>
62#include <print.h>
63#include <sysinfo/sysinfo.h>
64
65/*NS16550 as a COM 1*/
66#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
67#define NS16550_PORT 0x3f8
68
69bootinfo_t *bootinfo;
70
71static uint64_t iosapic_base=0xfec00000;
72
73void arch_pre_main(void)
74{
75 /* Setup usermode init tasks. */
76
77 unsigned int i;
78
79 init.cnt = bootinfo->taskmap.count;
80
81 for (i = 0; i < init.cnt; i++) {
82 init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
83 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
84 }
85}
86
87void arch_pre_mm_init(void)
88{
89 /* Set Interruption Vector Address (i.e. location of interruption vector table). */
90 iva_write((uintptr_t) &ivt);
91 srlz_d();
92
93}
94
95static void iosapic_init(void)
96{
97
98 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
99 int i;
100
101 int myid,myeid;
102
103 myid=ia64_get_cpu_id();
104 myeid=ia64_get_cpu_eid();
105
106 for(i=0;i<16;i++)
107 {
108
109 if(i==2) continue; //Disable Cascade interrupt
110 ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
111 srlz_d();
112 ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
113 srlz_d();
114 ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
115 srlz_d();
116 ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32);
117 srlz_d();
118 }
119
120}
121
122
123void arch_post_mm_init(void)
124{
125 if(config.cpu_active==1)
126 {
127 iosapic_init();
128
129 irq_init(INR_COUNT, INR_COUNT);
130#ifdef SKI
131 ski_init_console();
132#else
133 ega_init();
134#endif
135 }
136 it_init();
137
138}
139
140void arch_post_cpu_init(void)
141{
142}
143
144void arch_pre_smp_init(void)
145{
146}
147
148
149#ifdef I460GX
150#define POLL_INTERVAL 50000 /* 50 ms */
151/** Kernel thread for polling keyboard. */
152static void i8042_kkbdpoll(void *arg)
153{
154 while (1) {
155#ifdef CONFIG_NS16550
156 #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
157 ns16550_poll();
158 #endif
159#else
160 #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
161 i8042_poll();
162 #endif
163#endif
164 thread_usleep(POLL_INTERVAL);
165 }
166}
167#endif
168
169
170void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));
171void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
172{
173 return;
174}
175
176
177void arch_post_smp_init(void)
178{
179
180 {
181 /*
182 * Create thread that polls keyboard.
183 */
184#ifdef SKI
185 thread_t *t;
186 t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
187 if (!t)
188 panic("cannot create kkbdpoll\n");
189 thread_ready(t);
190#endif
191
192#ifdef I460GX
193 devno_t kbd = device_assign_devno();
194 /* keyboard controller */
195
196#ifdef CONFIG_NS16550
197 ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
198#else
199 devno_t mouse = device_assign_devno();
200 i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
201#endif
202 thread_t *t;
203 t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
204 if (!t)
205 panic("cannot create kkbdpoll\n");
206 thread_ready(t);
207
208#endif
209
210 }
211
212 sysinfo_set_item_val("ia64_iospace", NULL, true);
213 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
214 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
215
216
217
218
219
220}
221
222
223/** Enter userspace and never return. */
224void userspace(uspace_arg_t *kernel_uarg)
225{
226 psr_t psr;
227 rsc_t rsc;
228
229 psr.value = psr_read();
230 psr.cpl = PL_USER;
231 psr.i = true; /* start with interrupts enabled */
232 psr.ic = true;
233 psr.ri = 0; /* start with instruction #0 */
234 psr.bn = 1; /* start in bank 0 */
235
236 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
237 rsc.loadrs = 0;
238 rsc.be = false;
239 rsc.pl = PL_USER;
240 rsc.mode = 3; /* eager mode */
241
242 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
243 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
244 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
245 (uintptr_t) kernel_uarg->uspace_uarg,
246 psr.value, rsc.value);
247
248 while (1) {
249 ;
250 }
251}
252
253/** Set thread-local-storage pointer.
254 *
255 * We use r13 (a.k.a. tp) for this purpose.
256 */
257unative_t sys_tls_set(unative_t addr)
258{
259 return 0;
260}
261
262/** Acquire console back for kernel
263 *
264 */
265void arch_grab_console(void)
266{
267#ifdef SKI
268 ski_kbd_grab();
269#else
270 #ifdef CONFIG_NS16550
271 ns16550_grab();
272 #else
273 i8042_grab();
274 #endif
275#endif
276}
277/** Return console to userspace
278 *
279 */
280void arch_release_console(void)
281{
282#ifdef SKI
283 ski_kbd_release();
284#else
285 #ifdef CONFIG_NS16550
286 ns16550_release();
287 #else
288 i8042_release();
289 #endif
290
291#endif
292}
293
294void arch_reboot(void)
295{
296 outb(0x64,0xfe);
297 while (1);
298}
299
300/** @}
301 */
Note: See TracBrowser for help on using the repository browser.