source: mainline/kernel/arch/ia64/src/ia64.c@ df4ed85

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since df4ed85 was df4ed85, checked in by Jakub Jermar <jakub@…>, 18 years ago

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1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/ski/ski.h>
37#include <arch/drivers/it.h>
38#include <arch/interrupt.h>
39#include <arch/barrier.h>
40#include <arch/asm.h>
41#include <arch/register.h>
42#include <arch/types.h>
43#include <arch/context.h>
44#include <arch/stack.h>
45#include <arch/mm/page.h>
46#include <mm/as.h>
47#include <config.h>
48#include <userspace.h>
49#include <console/console.h>
50#include <proc/uarg.h>
51#include <syscall/syscall.h>
52#include <ddi/irq.h>
53#include <arch/simics/ega.h>
54
55void arch_pre_main(void)
56{
57 /* Setup usermode init tasks. */
58 init.cnt = 8;
59 init.tasks[0].addr = INIT0_ADDRESS;
60 init.tasks[0].size = INIT0_SIZE;
61 init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
62 init.tasks[1].size = INIT0_SIZE;
63 init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
64 init.tasks[2].size = INIT0_SIZE;
65 init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
66 init.tasks[3].size = INIT0_SIZE;
67 init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
68 init.tasks[4].size = INIT0_SIZE;
69 init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
70 init.tasks[5].size = INIT0_SIZE;
71 init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
72 init.tasks[6].size = INIT0_SIZE;
73 init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
74 init.tasks[7].size = INIT0_SIZE;
75}
76
77void arch_pre_mm_init(void)
78{
79 /* Set Interruption Vector Address (i.e. location of interruption vector table). */
80 iva_write((uintptr_t) &ivt);
81 srlz_d();
82
83}
84
85
86
87void arch_post_mm_init(void)
88{
89 irq_init(INR_COUNT, INR_COUNT);
90#ifdef SKI
91 ski_init_console();
92#else
93 ega_init();
94#endif
95 it_init();
96}
97
98void arch_post_cpu_init(void)
99{
100}
101
102void arch_pre_smp_init(void)
103{
104}
105
106void arch_post_smp_init(void)
107{
108
109 if (config.cpu_active == 1) {
110 /*
111 * Create thread that polls keyboard.
112 */
113#ifdef SKI
114 thread_t *t;
115 t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
116 if (!t)
117 panic("cannot create kkbdpoll\n");
118 thread_ready(t);
119#endif
120 }
121}
122
123/** Enter userspace and never return. */
124void userspace(uspace_arg_t *kernel_uarg)
125{
126 psr_t psr;
127 rsc_t rsc;
128
129 psr.value = psr_read();
130 psr.cpl = PL_USER;
131 psr.i = true; /* start with interrupts enabled */
132 psr.ic = true;
133 psr.ri = 0; /* start with instruction #0 */
134 psr.bn = 1; /* start in bank 0 */
135
136 __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
137 rsc.loadrs = 0;
138 rsc.be = false;
139 rsc.pl = PL_USER;
140 rsc.mode = 3; /* eager mode */
141
142 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
143 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
144 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
145 (uintptr_t) kernel_uarg->uspace_uarg,
146 psr.value, rsc.value);
147
148 while (1) {
149 ;
150 }
151}
152
153/** Set thread-local-storage pointer.
154 *
155 * We use r13 (a.k.a. tp) for this purpose.
156 */
157unative_t sys_tls_set(unative_t addr)
158{
159 return 0;
160}
161
162/** Acquire console back for kernel
163 *
164 */
165void arch_grab_console(void)
166{
167#ifdef SKI
168 ski_kbd_grab();
169#endif
170}
171/** Return console to userspace
172 *
173 */
174void arch_release_console(void)
175{
176#ifdef SKI
177 ski_kbd_release();
178#endif
179}
180
181/** @}
182 */
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