source: mainline/kernel/arch/ia64/src/ia64.c@ 22a28a69

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 22a28a69 was 4872160, checked in by Martin Decky <martin@…>, 15 years ago

new boot infrastructure

  • more code and metadata unification
  • import of up-to-date implementations from the kernel
  • the boot loaders should behave more similarly on all platforms
  • support for deflate compressed (LZ77) boot components
    • this again allows feasible boot images to be created on mips32
  • IA64 is still not booting
    • the broken forked GNU EFI library has been removed, a replacement of the functionality is on its way
  • Property mode set to 100644
File size: 7.4 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/drivers/ski.h>
37#include <arch/drivers/it.h>
38#include <arch/interrupt.h>
39#include <arch/barrier.h>
40#include <arch/asm.h>
41#include <arch/register.h>
42#include <typedefs.h>
43#include <arch/context.h>
44#include <arch/stack.h>
45#include <arch/mm/page.h>
46#include <interrupt.h>
47#include <mm/as.h>
48#include <config.h>
49#include <macros.h>
50#include <userspace.h>
51#include <console/console.h>
52#include <proc/uarg.h>
53#include <syscall/syscall.h>
54#include <ddi/irq.h>
55#include <arch/bootinfo.h>
56#include <genarch/drivers/legacy/ia32/io.h>
57#include <genarch/drivers/ega/ega.h>
58#include <genarch/kbrd/kbrd.h>
59#include <genarch/srln/srln.h>
60#include <genarch/drivers/i8042/i8042.h>
61#include <genarch/drivers/ns16550/ns16550.h>
62#include <arch/drivers/kbd.h>
63#include <smp/smp.h>
64#include <smp/ipi.h>
65#include <arch/atomic.h>
66#include <panic.h>
67#include <print.h>
68#include <sysinfo/sysinfo.h>
69#include <str.h>
70
71/* NS16550 as a COM 1 */
72#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
73
74bootinfo_t *bootinfo;
75
76static uint64_t iosapic_base = 0xfec00000;
77
78/** Performs ia64-specific initialization before main_bsp() is called. */
79void arch_pre_main(void)
80{
81 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
82 size_t i;
83 for (i = 0; i < init.cnt; i++) {
84 init.tasks[i].addr =
85 ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
86 VRN_MASK;
87 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
88 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
89 bootinfo->taskmap.tasks[i].name);
90 }
91}
92
93void arch_pre_mm_init(void)
94{
95 /*
96 * Set Interruption Vector Address (i.e. location of interruption vector
97 * table).
98 */
99 iva_write((uintptr_t) &ivt);
100 srlz_d();
101
102}
103
104static void iosapic_init(void)
105{
106 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
107 int i;
108
109 int myid, myeid;
110
111 myid = ia64_get_cpu_id();
112 myeid = ia64_get_cpu_eid();
113
114 for (i = 0; i < 16; i++) {
115 if (i == 2)
116 continue; /* Disable Cascade interrupt */
117 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
118 srlz_d();
119 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
120 srlz_d();
121 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
122 srlz_d();
123 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
124 myeid << (48 - 32);
125 srlz_d();
126 }
127
128}
129
130void arch_post_mm_init(void)
131{
132 if (config.cpu_active == 1) {
133 iosapic_init();
134 irq_init(INR_COUNT, INR_COUNT);
135 }
136 it_init();
137}
138
139void arch_post_cpu_init(void)
140{
141}
142
143void arch_pre_smp_init(void)
144{
145}
146
147void arch_post_smp_init(void)
148{
149#ifdef MACHINE_ski
150 ski_instance_t *ski_instance = skiin_init();
151 if (ski_instance) {
152 srln_instance_t *srln_instance = srln_init();
153 if (srln_instance) {
154 indev_t *sink = stdin_wire();
155 indev_t *srln = srln_wire(srln_instance, sink);
156 skiin_wire(ski_instance, srln);
157 }
158 }
159
160 outdev_t *skidev = skiout_init();
161 if (skidev)
162 stdout_wire(skidev);
163#endif
164
165#ifdef CONFIG_EGA
166 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
167 if (egadev)
168 stdout_wire(egadev);
169#endif
170
171#ifdef CONFIG_NS16550
172 ns16550_instance_t *ns16550_instance
173 = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
174 if (ns16550_instance) {
175 srln_instance_t *srln_instance = srln_init();
176 if (srln_instance) {
177 indev_t *sink = stdin_wire();
178 indev_t *srln = srln_wire(srln_instance, sink);
179 ns16550_wire(ns16550_instance, srln);
180 }
181 }
182
183 sysinfo_set_item_val("kbd", NULL, true);
184 sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
185 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
186 sysinfo_set_item_val("kbd.address.physical", NULL,
187 (uintptr_t) NS16550_BASE);
188 sysinfo_set_item_val("kbd.address.kernel", NULL,
189 (uintptr_t) NS16550_BASE);
190#endif
191
192#ifdef CONFIG_I8042
193 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
194 if (i8042_instance) {
195 kbrd_instance_t *kbrd_instance = kbrd_init();
196 if (kbrd_instance) {
197 indev_t *sink = stdin_wire();
198 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
199 i8042_wire(i8042_instance, kbrd);
200 }
201 }
202
203 sysinfo_set_item_val("i8042", NULL, true);
204 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
205 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
206 sysinfo_set_item_val("i8042.address.physical", NULL,
207 (uintptr_t) I8042_BASE);
208 sysinfo_set_item_val("i8042.address.kernel", NULL,
209 (uintptr_t) I8042_BASE);
210#endif
211
212 sysinfo_set_item_val("netif.dp8390.inr", NULL, IRQ_DP8390);
213
214 sysinfo_set_item_val("ia64_iospace", NULL, true);
215 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
216 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
217}
218
219
220/** Enter userspace and never return. */
221void userspace(uspace_arg_t *kernel_uarg)
222{
223 psr_t psr;
224 rsc_t rsc;
225
226 psr.value = psr_read();
227 psr.cpl = PL_USER;
228 psr.i = true; /* start with interrupts enabled */
229 psr.ic = true;
230 psr.ri = 0; /* start with instruction #0 */
231 psr.bn = 1; /* start in bank 0 */
232
233 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
234 rsc.loadrs = 0;
235 rsc.be = false;
236 rsc.pl = PL_USER;
237 rsc.mode = 3; /* eager mode */
238
239 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
240 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
241 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
242 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
243 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
244
245 while (1)
246 ;
247}
248
249/** Set thread-local-storage pointer.
250 *
251 * We use r13 (a.k.a. tp) for this purpose.
252 */
253unative_t sys_tls_set(unative_t addr)
254{
255 return 0;
256}
257
258void arch_reboot(void)
259{
260 pio_write_8((ioport8_t *)0x64, 0xfe);
261 while (1)
262 ;
263}
264
265/** Construct function pointer
266 *
267 * @param fptr function pointer structure
268 * @param addr function address
269 * @param caller calling function address
270 *
271 * @return address of the function pointer
272 *
273 */
274void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
275{
276 fptr->fnc = (unative_t) addr;
277 fptr->gp = ((unative_t *) caller)[1];
278
279 return (void *) fptr;
280}
281
282void irq_initialize_arch(irq_t *irq)
283{
284 (void) irq;
285}
286
287/** @}
288 */
Note: See TracBrowser for help on using the repository browser.