source: mainline/kernel/arch/ia64/src/ia64.c@ f2d2c7ba

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f2d2c7ba was c2417bc, checked in by Martin Decky <martin@…>, 17 years ago

change the way how input devices are wired together according to ticket #44
(also the proposal http://lists.modry.cz/cgi-bin/private/helenos-devel/2009-March/002507.html)

  • Property mode set to 100644
File size: 7.3 KB
RevLine 
[2a0047fc]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[2a0047fc]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[244f284]35#include <arch.h>
[c2417bc]36#include <arch/drivers/ski.h>
[154049e]37#include <arch/drivers/it.h>
[e2ec980f]38#include <arch/interrupt.h>
39#include <arch/barrier.h>
[b994a60]40#include <arch/asm.h>
41#include <arch/register.h>
[e2ec980f]42#include <arch/types.h>
[b994a60]43#include <arch/context.h>
[5c089c3a]44#include <arch/stack.h>
[b994a60]45#include <arch/mm/page.h>
46#include <mm/as.h>
47#include <config.h>
48#include <userspace.h>
[a8c48241]49#include <console/console.h>
[0f250f9]50#include <proc/uarg.h>
[e1be3b6]51#include <syscall/syscall.h>
[de57e060]52#include <ddi/irq.h>
[743ffa6e]53#include <arch/bootinfo.h>
[91825d90]54#include <genarch/drivers/legacy/ia32/io.h>
[f245145]55#include <genarch/drivers/ega/ega.h>
[411b6a6]56#include <genarch/kbrd/kbrd.h>
[4c84368e]57#include <genarch/srln/srln.h>
[411b6a6]58#include <genarch/drivers/i8042/i8042.h>
[4c84368e]59#include <genarch/drivers/ns16550/ns16550.h>
60#include <arch/drivers/kbd.h>
[59e4864]61#include <smp/smp.h>
62#include <smp/ipi.h>
63#include <arch/atomic.h>
64#include <panic.h>
65#include <print.h>
[46321fb]66#include <sysinfo/sysinfo.h>
[46db10e9]67#include <string.h>
[59e4864]68
[666773c]69/* NS16550 as a COM 1 */
[449d4ecc]70#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
[743ffa6e]71
72bootinfo_t *bootinfo;
[586262f]73
[666773c]74static uint64_t iosapic_base = 0xfec00000;
[323a5aaf]75
[06f96234]76/** Performs ia64-specific initialization before main_bsp() is called. */
[6ecc8bce]77void arch_pre_main(void)
78{
79 /* Setup usermode init tasks. */
[743ffa6e]80
[6c441cf8]81 unsigned int i;
82
[743ffa6e]83 init.cnt = bootinfo->taskmap.count;
[6c441cf8]84
85 for (i = 0; i < init.cnt; i++) {
[666773c]86 init.tasks[i].addr =
87 ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
88 VRN_MASK;
[6c441cf8]89 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
[f4b1535]90 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
91 bootinfo->taskmap.tasks[i].name);
[743ffa6e]92 }
[6ecc8bce]93}
94
[244f284]95void arch_pre_mm_init(void)
96{
[666773c]97 /*
98 * Set Interruption Vector Address (i.e. location of interruption vector
99 * table).
100 */
[7f1c620]101 iva_write((uintptr_t) &ivt);
[e2ec980f]102 srlz_d();
103
[244f284]104}
105
[323a5aaf]106static void iosapic_init(void)
107{
[666773c]108 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
[323a5aaf]109 int i;
110
[2b70a6e]111 int myid, myeid;
[323a5aaf]112
[666773c]113 myid = ia64_get_cpu_id();
114 myeid = ia64_get_cpu_eid();
[50b3d30]115
[666773c]116 for (i = 0; i < 16; i++) {
117 if (i == 2)
118 continue; /* Disable Cascade interrupt */
119 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
[323a5aaf]120 srlz_d();
[666773c]121 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
[323a5aaf]122 srlz_d();
[666773c]123 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
[323a5aaf]124 srlz_d();
[666773c]125 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
126 myeid << (48 - 32);
[323a5aaf]127 srlz_d();
128 }
129
130}
131
[244f284]132void arch_post_mm_init(void)
133{
[666773c]134 if (config.cpu_active == 1) {
[323a5aaf]135 iosapic_init();
[59e4864]136 irq_init(INR_COUNT, INR_COUNT);
137 }
[2270bef]138 it_init();
[244f284]139}
[7453929]140
[26678e5]141void arch_post_cpu_init(void)
142{
143}
144
[7453929]145void arch_pre_smp_init(void)
146{
147}
148
149void arch_post_smp_init(void)
150{
[c2417bc]151#ifdef MACHINE_ski
152 ski_instance_t *ski_instance = skiin_init();
153 if (ski_instance) {
154 srln_instance_t *srln_instance = srln_init();
155 if (srln_instance) {
156 indev_t *sink = stdin_wire();
157 indev_t *srln = srln_wire(srln_instance, sink);
158 skiin_wire(ski_instance, srln);
159 }
160 }
161
[c640876]162 skiout_init();
[1462d35]163#endif
164
[2270bef]165#ifdef CONFIG_EGA
166 ega_init(EGA_BASE, EGA_VIDEORAM);
167#endif
[1462d35]168
[59e4864]169#ifdef CONFIG_NS16550
[c2417bc]170 ns16550_instance_t *ns16550_instance
[84afc7b]171 = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
[c2417bc]172 if (ns16550_instance) {
173 srln_instance_t *srln_instance = srln_init();
174 if (srln_instance) {
175 indev_t *sink = stdin_wire();
176 indev_t *srln = srln_wire(srln_instance, sink);
177 ns16550_wire(ns16550_instance, srln);
178 }
179 }
[1462d35]180
[449d4ecc]181 sysinfo_set_item_val("kbd", NULL, true);
182 sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
[4c7257b]183 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
[ff685c9]184 sysinfo_set_item_val("kbd.address.physical", NULL,
185 (uintptr_t) NS16550_BASE);
186 sysinfo_set_item_val("kbd.address.kernel", NULL,
187 (uintptr_t) NS16550_BASE);
[449d4ecc]188#endif
189
190#ifdef CONFIG_I8042
[c2417bc]191 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
192 if (i8042_instance) {
193 kbrd_instance_t *kbrd_instance = kbrd_init();
194 if (kbrd_instance) {
195 indev_t *sink = stdin_wire();
196 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
197 i8042_wire(i8042_instance, kbrd);
198 }
199 }
[1462d35]200
[449d4ecc]201 sysinfo_set_item_val("kbd", NULL, true);
202 sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
[4c7257b]203 sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
[ff685c9]204 sysinfo_set_item_val("kbd.address.physical", NULL,
205 (uintptr_t) I8042_BASE);
206 sysinfo_set_item_val("kbd.address.kernel", NULL,
207 (uintptr_t) I8042_BASE);
[59e4864]208#endif
[1462d35]209
[46321fb]210 sysinfo_set_item_val("ia64_iospace", NULL, true);
211 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
212 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
[7453929]213}
[b994a60]214
[59e4864]215
[b994a60]216/** Enter userspace and never return. */
[0f250f9]217void userspace(uspace_arg_t *kernel_uarg)
[b994a60]218{
219 psr_t psr;
220 rsc_t rsc;
221
222 psr.value = psr_read();
223 psr.cpl = PL_USER;
[666773c]224 psr.i = true; /* start with interrupts enabled */
[b994a60]225 psr.ic = true;
[666773c]226 psr.ri = 0; /* start with instruction #0 */
227 psr.bn = 1; /* start in bank 0 */
[b994a60]228
[e7b7be3f]229 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
[b994a60]230 rsc.loadrs = 0;
231 rsc.be = false;
232 rsc.pl = PL_USER;
[666773c]233 rsc.mode = 3; /* eager mode */
[b994a60]234
[7f1c620]235 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
[666773c]236 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
237 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
238 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
239 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
[b994a60]240
[666773c]241 while (1)
[b994a60]242 ;
243}
[e1be3b6]244
245/** Set thread-local-storage pointer.
246 *
247 * We use r13 (a.k.a. tp) for this purpose.
248 */
[7f1c620]249unative_t sys_tls_set(unative_t addr)
[e1be3b6]250{
251 return 0;
252}
[41d33ac]253
254/** Acquire console back for kernel
255 *
256 */
257void arch_grab_console(void)
258{
[c2417bc]259#ifdef MACHINE_ski
[de57e060]260 ski_kbd_grab();
[516ff92]261#endif
[41d33ac]262}
[666773c]263
[41d33ac]264/** Return console to userspace
265 *
266 */
267void arch_release_console(void)
268{
[c2417bc]269#ifdef MACHINE_ski
[de57e060]270 ski_kbd_release();
[49319ac]271#endif
[41d33ac]272}
[b45c443]273
[f74bbaf]274void arch_reboot(void)
275{
[013c4d6]276 pio_write_8((ioport8_t *)0x64, 0xfe);
[666773c]277 while (1)
278 ;
[f74bbaf]279}
280
[6da1013f]281/** Construct function pointer
282 *
283 * @param fptr function pointer structure
284 * @param addr function address
285 * @param caller calling function address
286 *
287 * @return address of the function pointer
288 *
289 */
290void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
291{
292 fptr->fnc = (unative_t) addr;
293 fptr->gp = ((unative_t *) caller)[1];
294
295 return (void *) fptr;
296}
297
[06e1e95]298/** @}
[b45c443]299 */
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