source: mainline/kernel/arch/ia64/src/ia64.c@ d8db519

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d8db519 was d8db519, checked in by Martin Decky <martin@…>, 14 years ago

update syscall prototypes
cleanup includes

  • Property mode set to 100644
File size: 7.3 KB
RevLine 
[2a0047fc]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[2a0047fc]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[244f284]35#include <arch.h>
[d99c1d2]36#include <typedefs.h>
[d8db519]37#include <errno.h>
[3a2f8aa]38#include <interrupt.h>
[4872160]39#include <macros.h>
[d8db519]40#include <str.h>
[b994a60]41#include <userspace.h>
[a8c48241]42#include <console/console.h>
[e1be3b6]43#include <syscall/syscall.h>
[d8db519]44#include <sysinfo/sysinfo.h>
45#include <arch/drivers/it.h>
46#include <arch/drivers/kbd.h>
[f245145]47#include <genarch/drivers/ega/ega.h>
[411b6a6]48#include <genarch/drivers/i8042/i8042.h>
[4c84368e]49#include <genarch/drivers/ns16550/ns16550.h>
[d8db519]50#include <genarch/drivers/legacy/ia32/io.h>
51#include <genarch/kbrd/kbrd.h>
52#include <genarch/srln/srln.h>
[59e4864]53
[666773c]54/* NS16550 as a COM 1 */
[449d4ecc]55#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
[743ffa6e]56
57bootinfo_t *bootinfo;
[586262f]58
[666773c]59static uint64_t iosapic_base = 0xfec00000;
[323a5aaf]60
[06f96234]61/** Performs ia64-specific initialization before main_bsp() is called. */
[6ecc8bce]62void arch_pre_main(void)
63{
[4872160]64 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
65 size_t i;
[6c441cf8]66 for (i = 0; i < init.cnt; i++) {
[666773c]67 init.tasks[i].addr =
68 ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
69 VRN_MASK;
[6c441cf8]70 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
[f4b1535]71 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
72 bootinfo->taskmap.tasks[i].name);
[743ffa6e]73 }
[6ecc8bce]74}
75
[244f284]76void arch_pre_mm_init(void)
77{
78}
79
[323a5aaf]80static void iosapic_init(void)
81{
[96b02eb9]82 uint64_t IOSAPIC = PA2KA((sysarg_t)(iosapic_base)) | FW_OFFSET;
[323a5aaf]83 int i;
84
[2b70a6e]85 int myid, myeid;
[323a5aaf]86
[666773c]87 myid = ia64_get_cpu_id();
88 myeid = ia64_get_cpu_eid();
[50b3d30]89
[666773c]90 for (i = 0; i < 16; i++) {
91 if (i == 2)
92 continue; /* Disable Cascade interrupt */
93 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
[323a5aaf]94 srlz_d();
[666773c]95 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
[323a5aaf]96 srlz_d();
[666773c]97 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
[323a5aaf]98 srlz_d();
[666773c]99 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
100 myeid << (48 - 32);
[323a5aaf]101 srlz_d();
102 }
103
104}
105
[244f284]106void arch_post_mm_init(void)
107{
[666773c]108 if (config.cpu_active == 1) {
[323a5aaf]109 iosapic_init();
[59e4864]110 irq_init(INR_COUNT, INR_COUNT);
111 }
[2270bef]112 it_init();
[244f284]113}
[7453929]114
[26678e5]115void arch_post_cpu_init(void)
116{
117}
118
[7453929]119void arch_pre_smp_init(void)
120{
121}
122
123void arch_post_smp_init(void)
124{
[eff1f033]125 static const char *platform;
126
127 /* Set platform name. */
128#ifdef MACHINE_ski
[3714e79]129 platform = "ski";
[eff1f033]130#endif
131#ifdef MACHINE_i460GX
132 platform = "i460GX";
133#endif
134 sysinfo_set_item_data("platform", NULL, (void *) platform,
135 str_size(platform));
136
[c2417bc]137#ifdef MACHINE_ski
138 ski_instance_t *ski_instance = skiin_init();
139 if (ski_instance) {
140 srln_instance_t *srln_instance = srln_init();
141 if (srln_instance) {
142 indev_t *sink = stdin_wire();
143 indev_t *srln = srln_wire(srln_instance, sink);
144 skiin_wire(ski_instance, srln);
145 }
146 }
147
[a71c158]148 outdev_t *skidev = skiout_init();
149 if (skidev)
150 stdout_wire(skidev);
[1462d35]151#endif
152
[2270bef]153#ifdef CONFIG_EGA
[a71c158]154 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
155 if (egadev)
156 stdout_wire(egadev);
[2270bef]157#endif
[1462d35]158
[59e4864]159#ifdef CONFIG_NS16550
[c2417bc]160 ns16550_instance_t *ns16550_instance
[84afc7b]161 = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
[c2417bc]162 if (ns16550_instance) {
163 srln_instance_t *srln_instance = srln_init();
164 if (srln_instance) {
165 indev_t *sink = stdin_wire();
166 indev_t *srln = srln_wire(srln_instance, sink);
167 ns16550_wire(ns16550_instance, srln);
168 }
169 }
[1462d35]170
[449d4ecc]171 sysinfo_set_item_val("kbd", NULL, true);
172 sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
[4c7257b]173 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
[ff685c9]174 sysinfo_set_item_val("kbd.address.physical", NULL,
175 (uintptr_t) NS16550_BASE);
176 sysinfo_set_item_val("kbd.address.kernel", NULL,
177 (uintptr_t) NS16550_BASE);
[449d4ecc]178#endif
179
180#ifdef CONFIG_I8042
[c2417bc]181 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
182 if (i8042_instance) {
183 kbrd_instance_t *kbrd_instance = kbrd_init();
184 if (kbrd_instance) {
185 indev_t *sink = stdin_wire();
186 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
187 i8042_wire(i8042_instance, kbrd);
188 }
189 }
[1462d35]190
[03a4476]191 sysinfo_set_item_val("i8042", NULL, true);
192 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
193 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
194 sysinfo_set_item_val("i8042.address.physical", NULL,
[ff685c9]195 (uintptr_t) I8042_BASE);
[03a4476]196 sysinfo_set_item_val("i8042.address.kernel", NULL,
[ff685c9]197 (uintptr_t) I8042_BASE);
[59e4864]198#endif
[a70bda4]199
[f902d36]200 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
[a70bda4]201
[46321fb]202 sysinfo_set_item_val("ia64_iospace", NULL, true);
203 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
204 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
[7453929]205}
[b994a60]206
[59e4864]207
[b994a60]208/** Enter userspace and never return. */
[0f250f9]209void userspace(uspace_arg_t *kernel_uarg)
[b994a60]210{
211 psr_t psr;
212 rsc_t rsc;
213
214 psr.value = psr_read();
215 psr.cpl = PL_USER;
[666773c]216 psr.i = true; /* start with interrupts enabled */
[b994a60]217 psr.ic = true;
[666773c]218 psr.ri = 0; /* start with instruction #0 */
219 psr.bn = 1; /* start in bank 0 */
[b994a60]220
[e7b7be3f]221 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
[b994a60]222 rsc.loadrs = 0;
223 rsc.be = false;
224 rsc.pl = PL_USER;
[666773c]225 rsc.mode = 3; /* eager mode */
[b994a60]226
[2f23341]227 /*
228 * Switch to userspace.
229 *
230 * When calculating stack addresses, mind the stack split between the
231 * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
232 */
[7f1c620]233 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
[2f23341]234 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
[666773c]235 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
[2f23341]236 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
[666773c]237 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
[b994a60]238
[666773c]239 while (1)
[b994a60]240 ;
241}
[e1be3b6]242
243/** Set thread-local-storage pointer.
244 *
245 * We use r13 (a.k.a. tp) for this purpose.
246 */
[d8db519]247sysarg_t sys_tls_set(uintptr_t addr)
[e1be3b6]248{
[d8db519]249 return EOK;
[41d33ac]250}
[b45c443]251
[f74bbaf]252void arch_reboot(void)
253{
[013c4d6]254 pio_write_8((ioport8_t *)0x64, 0xfe);
[d8db519]255 while (1);
[f74bbaf]256}
257
[6da1013f]258/** Construct function pointer
259 *
260 * @param fptr function pointer structure
261 * @param addr function address
262 * @param caller calling function address
263 *
264 * @return address of the function pointer
265 *
266 */
267void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
268{
[96b02eb9]269 fptr->fnc = (sysarg_t) addr;
270 fptr->gp = ((sysarg_t *) caller)[1];
[6da1013f]271
272 return (void *) fptr;
273}
274
[3a2f8aa]275void irq_initialize_arch(irq_t *irq)
276{
277 (void) irq;
278}
279
[06e1e95]280/** @}
[b45c443]281 */
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