source: mainline/kernel/arch/ia64/src/ia64.c@ 5b0ae4be

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5b0ae4be was 5b0ae4be, checked in by Jakub Jermar <jakub@…>, 16 years ago

The kernel i8042 driver should be instance-neutral.

  • Property mode set to 100644
File size: 5.9 KB
RevLine 
[2a0047fc]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[2a0047fc]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[244f284]35#include <arch.h>
36#include <arch/ski/ski.h>
[154049e]37#include <arch/drivers/it.h>
[e2ec980f]38#include <arch/interrupt.h>
39#include <arch/barrier.h>
[b994a60]40#include <arch/asm.h>
41#include <arch/register.h>
[e2ec980f]42#include <arch/types.h>
[b994a60]43#include <arch/context.h>
[5c089c3a]44#include <arch/stack.h>
[b994a60]45#include <arch/mm/page.h>
46#include <mm/as.h>
47#include <config.h>
48#include <userspace.h>
[a8c48241]49#include <console/console.h>
[0f250f9]50#include <proc/uarg.h>
[e1be3b6]51#include <syscall/syscall.h>
[de57e060]52#include <ddi/irq.h>
[743ffa6e]53#include <ddi/device.h>
54#include <arch/bootinfo.h>
[91825d90]55#include <genarch/drivers/legacy/ia32/io.h>
[f245145]56#include <genarch/drivers/ega/ega.h>
[743ffa6e]57#include <genarch/kbd/i8042.h>
[59e4864]58#include <genarch/kbd/ns16550.h>
59#include <smp/smp.h>
60#include <smp/ipi.h>
61#include <arch/atomic.h>
62#include <panic.h>
63#include <print.h>
[46321fb]64#include <sysinfo/sysinfo.h>
[59e4864]65
[666773c]66/* NS16550 as a COM 1 */
67#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
[743ffa6e]68
69bootinfo_t *bootinfo;
[586262f]70
[666773c]71static uint64_t iosapic_base = 0xfec00000;
[323a5aaf]72
[6ecc8bce]73void arch_pre_main(void)
74{
75 /* Setup usermode init tasks. */
[743ffa6e]76
[6c441cf8]77 unsigned int i;
78
[743ffa6e]79 init.cnt = bootinfo->taskmap.count;
[6c441cf8]80
81 for (i = 0; i < init.cnt; i++) {
[666773c]82 init.tasks[i].addr =
83 ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
84 VRN_MASK;
[6c441cf8]85 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
[743ffa6e]86 }
[6ecc8bce]87}
88
[244f284]89void arch_pre_mm_init(void)
90{
[666773c]91 /*
92 * Set Interruption Vector Address (i.e. location of interruption vector
93 * table).
94 */
[7f1c620]95 iva_write((uintptr_t) &ivt);
[e2ec980f]96 srlz_d();
97
[244f284]98}
99
[323a5aaf]100static void iosapic_init(void)
101{
[666773c]102 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
[323a5aaf]103 int i;
104
[2b70a6e]105 int myid, myeid;
[323a5aaf]106
[666773c]107 myid = ia64_get_cpu_id();
108 myeid = ia64_get_cpu_eid();
[50b3d30]109
[666773c]110 for (i = 0; i < 16; i++) {
111 if (i == 2)
112 continue; /* Disable Cascade interrupt */
113 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
[323a5aaf]114 srlz_d();
[666773c]115 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
[323a5aaf]116 srlz_d();
[666773c]117 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
[323a5aaf]118 srlz_d();
[666773c]119 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
120 myeid << (48 - 32);
[323a5aaf]121 srlz_d();
122 }
123
124}
125
126
[244f284]127void arch_post_mm_init(void)
128{
[666773c]129 if (config.cpu_active == 1) {
[323a5aaf]130 iosapic_init();
[59e4864]131 irq_init(INR_COUNT, INR_COUNT);
[49319ac]132#ifdef SKI
[59e4864]133 ski_init_console();
[6da1013f]134#else
[f245145]135 ega_init(EGA_BASE, EGA_VIDEORAM);
[6da1013f]136#endif
[59e4864]137 }
[323a5aaf]138 it_init();
139
[244f284]140}
[7453929]141
[26678e5]142void arch_post_cpu_init(void)
143{
144}
145
[7453929]146void arch_pre_smp_init(void)
147{
148}
149
150void arch_post_smp_init(void)
151{
[666773c]152 /*
153 * Create thread that polls keyboard.
154 */
[49319ac]155#ifdef SKI
[e7f2ad68]156 thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
[666773c]157 if (!t)
[f651e80]158 panic("Cannot create kkbdpoll.");
[666773c]159 thread_ready(t);
[49319ac]160#endif
[743ffa6e]161
162#ifdef I460GX
[666773c]163 devno_t kbd = device_assign_devno();
[743ffa6e]164
[59e4864]165#ifdef CONFIG_NS16550
[013c4d6]166 (void) ns16550_init((ns16550_t *)NS16550_BASE, kbd, NS16550_IRQ, NULL,
167 NULL);
[59e4864]168#else
[5b0ae4be]169 (void) i8042_init((i8042_t *)I8042_BASE, kbd, IRQ_KBD);
[59e4864]170#endif
[743ffa6e]171#endif
172
[46321fb]173 sysinfo_set_item_val("ia64_iospace", NULL, true);
174 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
175 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
[7453929]176}
[b994a60]177
[59e4864]178
[b994a60]179/** Enter userspace and never return. */
[0f250f9]180void userspace(uspace_arg_t *kernel_uarg)
[b994a60]181{
182 psr_t psr;
183 rsc_t rsc;
184
185 psr.value = psr_read();
186 psr.cpl = PL_USER;
[666773c]187 psr.i = true; /* start with interrupts enabled */
[b994a60]188 psr.ic = true;
[666773c]189 psr.ri = 0; /* start with instruction #0 */
190 psr.bn = 1; /* start in bank 0 */
[b994a60]191
[e7b7be3f]192 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
[b994a60]193 rsc.loadrs = 0;
194 rsc.be = false;
195 rsc.pl = PL_USER;
[666773c]196 rsc.mode = 3; /* eager mode */
[b994a60]197
[7f1c620]198 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
[666773c]199 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
200 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
201 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
202 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
[b994a60]203
[666773c]204 while (1)
[b994a60]205 ;
206}
[e1be3b6]207
208/** Set thread-local-storage pointer.
209 *
210 * We use r13 (a.k.a. tp) for this purpose.
211 */
[7f1c620]212unative_t sys_tls_set(unative_t addr)
[e1be3b6]213{
214 return 0;
215}
[41d33ac]216
217/** Acquire console back for kernel
218 *
219 */
220void arch_grab_console(void)
221{
[49319ac]222#ifdef SKI
[de57e060]223 ski_kbd_grab();
[516ff92]224#endif
[41d33ac]225}
[666773c]226
[41d33ac]227/** Return console to userspace
228 *
229 */
230void arch_release_console(void)
231{
[49319ac]232#ifdef SKI
[de57e060]233 ski_kbd_release();
[49319ac]234#endif
[41d33ac]235}
[b45c443]236
[f74bbaf]237void arch_reboot(void)
238{
[013c4d6]239 pio_write_8((ioport8_t *)0x64, 0xfe);
[666773c]240 while (1)
241 ;
[f74bbaf]242}
243
[6da1013f]244/** Construct function pointer
245 *
246 * @param fptr function pointer structure
247 * @param addr function address
248 * @param caller calling function address
249 *
250 * @return address of the function pointer
251 *
252 */
253void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
254{
255 fptr->fnc = (unative_t) addr;
256 fptr->gp = ((unative_t *) caller)[1];
257
258 return (void *) fptr;
259}
260
[06e1e95]261/** @}
[b45c443]262 */
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