source: mainline/kernel/arch/ia64/src/ia64.c@ 22f0561

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 22f0561 was 22f0561, checked in by Jakub Jermar <jakub@…>, 14 years ago

Get rid of kernel static non-identity mappings on ia64.

  • IO_OFFSET is replaced by legacyio_virt_base and LEGACYIO_USER_BASE.
  • VIO_OFFSET and FW_OFFSET are removed entirely.
  • Legacy I/O and IO SAPIC are mapped via hw_map().
  • Remove corresponding locked translation records.
  • Cleanup ia64 kernel pio_read/write_8|16|32().
  • Property mode set to 100644
File size: 7.5 KB
RevLine 
[2a0047fc]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[2a0047fc]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[244f284]35#include <arch.h>
[d99c1d2]36#include <typedefs.h>
[d8db519]37#include <errno.h>
[3a2f8aa]38#include <interrupt.h>
[4872160]39#include <macros.h>
[d8db519]40#include <str.h>
[b994a60]41#include <userspace.h>
[a8c48241]42#include <console/console.h>
[e1be3b6]43#include <syscall/syscall.h>
[d8db519]44#include <sysinfo/sysinfo.h>
45#include <arch/drivers/it.h>
46#include <arch/drivers/kbd.h>
[22f0561]47#include <arch/legacyio.h>
[f245145]48#include <genarch/drivers/ega/ega.h>
[411b6a6]49#include <genarch/drivers/i8042/i8042.h>
[4c84368e]50#include <genarch/drivers/ns16550/ns16550.h>
[d8db519]51#include <genarch/drivers/legacy/ia32/io.h>
52#include <genarch/kbrd/kbrd.h>
53#include <genarch/srln/srln.h>
[22f0561]54#include <mm/page.h>
55
56#ifdef MACHINE_ski
57#include <arch/drivers/ski.h>
58#endif
[59e4864]59
[666773c]60/* NS16550 as a COM 1 */
[449d4ecc]61#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
[743ffa6e]62
63bootinfo_t *bootinfo;
[586262f]64
[666773c]65static uint64_t iosapic_base = 0xfec00000;
[22f0561]66uintptr_t legacyio_virt_base = 0;
[323a5aaf]67
[06f96234]68/** Performs ia64-specific initialization before main_bsp() is called. */
[6ecc8bce]69void arch_pre_main(void)
70{
[4872160]71 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
72 size_t i;
[6c441cf8]73 for (i = 0; i < init.cnt; i++) {
[666773c]74 init.tasks[i].addr =
75 ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
76 VRN_MASK;
[6c441cf8]77 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
[f4b1535]78 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
79 bootinfo->taskmap.tasks[i].name);
[743ffa6e]80 }
[6ecc8bce]81}
82
[244f284]83void arch_pre_mm_init(void)
84{
85}
86
[323a5aaf]87static void iosapic_init(void)
88{
[22f0561]89 uintptr_t IOSAPIC = hw_map(iosapic_base, PAGE_SIZE);
[323a5aaf]90 int i;
91
[2b70a6e]92 int myid, myeid;
[323a5aaf]93
[666773c]94 myid = ia64_get_cpu_id();
95 myeid = ia64_get_cpu_eid();
[50b3d30]96
[666773c]97 for (i = 0; i < 16; i++) {
98 if (i == 2)
99 continue; /* Disable Cascade interrupt */
100 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
[323a5aaf]101 srlz_d();
[666773c]102 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
[323a5aaf]103 srlz_d();
[666773c]104 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
[323a5aaf]105 srlz_d();
[666773c]106 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
107 myeid << (48 - 32);
[323a5aaf]108 srlz_d();
109 }
110
111}
112
[244f284]113void arch_post_mm_init(void)
114{
[666773c]115 if (config.cpu_active == 1) {
[22f0561]116 /* Map the page with legacy I/O. */
117 legacyio_virt_base = hw_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE);
118
[323a5aaf]119 iosapic_init();
[59e4864]120 irq_init(INR_COUNT, INR_COUNT);
121 }
[2270bef]122 it_init();
[244f284]123}
[7453929]124
[22f0561]125void arch_post_cpu_init(void){
[26678e5]126}
127
[7453929]128void arch_pre_smp_init(void)
129{
130}
131
132void arch_post_smp_init(void)
133{
[eff1f033]134 static const char *platform;
135
136 /* Set platform name. */
137#ifdef MACHINE_ski
[3714e79]138 platform = "ski";
[eff1f033]139#endif
140#ifdef MACHINE_i460GX
141 platform = "i460GX";
142#endif
143 sysinfo_set_item_data("platform", NULL, (void *) platform,
144 str_size(platform));
145
[c2417bc]146#ifdef MACHINE_ski
147 ski_instance_t *ski_instance = skiin_init();
148 if (ski_instance) {
149 srln_instance_t *srln_instance = srln_init();
150 if (srln_instance) {
151 indev_t *sink = stdin_wire();
152 indev_t *srln = srln_wire(srln_instance, sink);
153 skiin_wire(ski_instance, srln);
154 }
155 }
156
[a71c158]157 outdev_t *skidev = skiout_init();
158 if (skidev)
159 stdout_wire(skidev);
[1462d35]160#endif
161
[2270bef]162#ifdef CONFIG_EGA
[a71c158]163 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
164 if (egadev)
165 stdout_wire(egadev);
[2270bef]166#endif
[1462d35]167
[59e4864]168#ifdef CONFIG_NS16550
[c2417bc]169 ns16550_instance_t *ns16550_instance
[84afc7b]170 = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
[c2417bc]171 if (ns16550_instance) {
172 srln_instance_t *srln_instance = srln_init();
173 if (srln_instance) {
174 indev_t *sink = stdin_wire();
175 indev_t *srln = srln_wire(srln_instance, sink);
176 ns16550_wire(ns16550_instance, srln);
177 }
178 }
[1462d35]179
[449d4ecc]180 sysinfo_set_item_val("kbd", NULL, true);
181 sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
[4c7257b]182 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
[ff685c9]183 sysinfo_set_item_val("kbd.address.physical", NULL,
184 (uintptr_t) NS16550_BASE);
185 sysinfo_set_item_val("kbd.address.kernel", NULL,
186 (uintptr_t) NS16550_BASE);
[449d4ecc]187#endif
188
189#ifdef CONFIG_I8042
[c2417bc]190 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
191 if (i8042_instance) {
192 kbrd_instance_t *kbrd_instance = kbrd_init();
193 if (kbrd_instance) {
194 indev_t *sink = stdin_wire();
195 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
196 i8042_wire(i8042_instance, kbrd);
197 }
198 }
[1462d35]199
[03a4476]200 sysinfo_set_item_val("i8042", NULL, true);
201 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
202 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
203 sysinfo_set_item_val("i8042.address.physical", NULL,
[ff685c9]204 (uintptr_t) I8042_BASE);
[03a4476]205 sysinfo_set_item_val("i8042.address.kernel", NULL,
[ff685c9]206 (uintptr_t) I8042_BASE);
[59e4864]207#endif
[a70bda4]208
[f902d36]209 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
[a70bda4]210
[46321fb]211 sysinfo_set_item_val("ia64_iospace", NULL, true);
212 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
[22f0561]213 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, LEGACYIO_USER_BASE);
[7453929]214}
[b994a60]215
[59e4864]216
[b994a60]217/** Enter userspace and never return. */
[0f250f9]218void userspace(uspace_arg_t *kernel_uarg)
[b994a60]219{
220 psr_t psr;
221 rsc_t rsc;
222
223 psr.value = psr_read();
224 psr.cpl = PL_USER;
[666773c]225 psr.i = true; /* start with interrupts enabled */
[b994a60]226 psr.ic = true;
[666773c]227 psr.ri = 0; /* start with instruction #0 */
228 psr.bn = 1; /* start in bank 0 */
[b994a60]229
[e7b7be3f]230 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
[b994a60]231 rsc.loadrs = 0;
232 rsc.be = false;
233 rsc.pl = PL_USER;
[666773c]234 rsc.mode = 3; /* eager mode */
[b994a60]235
[2f23341]236 /*
237 * Switch to userspace.
238 *
239 * When calculating stack addresses, mind the stack split between the
240 * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
241 */
[7f1c620]242 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
[2f23341]243 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
[666773c]244 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
[2f23341]245 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
[666773c]246 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
[b994a60]247
[666773c]248 while (1)
[b994a60]249 ;
250}
[e1be3b6]251
252/** Set thread-local-storage pointer.
253 *
254 * We use r13 (a.k.a. tp) for this purpose.
255 */
[d8db519]256sysarg_t sys_tls_set(uintptr_t addr)
[e1be3b6]257{
[d8db519]258 return EOK;
[41d33ac]259}
[b45c443]260
[f74bbaf]261void arch_reboot(void)
262{
[013c4d6]263 pio_write_8((ioport8_t *)0x64, 0xfe);
[d8db519]264 while (1);
[f74bbaf]265}
266
[6da1013f]267/** Construct function pointer
268 *
269 * @param fptr function pointer structure
270 * @param addr function address
271 * @param caller calling function address
272 *
273 * @return address of the function pointer
274 *
275 */
276void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
277{
[96b02eb9]278 fptr->fnc = (sysarg_t) addr;
279 fptr->gp = ((sysarg_t *) caller)[1];
[6da1013f]280
281 return (void *) fptr;
282}
283
[3a2f8aa]284void irq_initialize_arch(irq_t *irq)
285{
286 (void) irq;
287}
288
[06e1e95]289/** @}
[b45c443]290 */
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