[2a0047fc] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[2a0047fc] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup ia64
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[244f284] | 35 | #include <arch.h>
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| 36 | #include <arch/ski/ski.h>
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[154049e] | 37 | #include <arch/drivers/it.h>
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[e2ec980f] | 38 | #include <arch/interrupt.h>
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| 39 | #include <arch/barrier.h>
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[b994a60] | 40 | #include <arch/asm.h>
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| 41 | #include <arch/register.h>
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[e2ec980f] | 42 | #include <arch/types.h>
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[b994a60] | 43 | #include <arch/context.h>
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[5c089c3a] | 44 | #include <arch/stack.h>
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[b994a60] | 45 | #include <arch/mm/page.h>
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| 46 | #include <mm/as.h>
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| 47 | #include <config.h>
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| 48 | #include <userspace.h>
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[a8c48241] | 49 | #include <console/console.h>
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[0f250f9] | 50 | #include <proc/uarg.h>
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[e1be3b6] | 51 | #include <syscall/syscall.h>
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[de57e060] | 52 | #include <ddi/irq.h>
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[743ffa6e] | 53 | #include <ddi/device.h>
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| 54 | #include <arch/bootinfo.h>
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[91825d90] | 55 | #include <genarch/drivers/legacy/ia32/io.h>
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[f245145] | 56 | #include <genarch/drivers/ega/ega.h>
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[411b6a6] | 57 | #include <genarch/kbrd/kbrd.h>
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[4c84368e] | 58 | #include <genarch/srln/srln.h>
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[411b6a6] | 59 | #include <genarch/drivers/i8042/i8042.h>
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[4c84368e] | 60 | #include <genarch/drivers/ns16550/ns16550.h>
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| 61 | #include <arch/drivers/kbd.h>
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[59e4864] | 62 | #include <smp/smp.h>
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| 63 | #include <smp/ipi.h>
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| 64 | #include <arch/atomic.h>
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| 65 | #include <panic.h>
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| 66 | #include <print.h>
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[46321fb] | 67 | #include <sysinfo/sysinfo.h>
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[46db10e9] | 68 | #include <string.h>
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[59e4864] | 69 |
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[666773c] | 70 | /* NS16550 as a COM 1 */
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| 71 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
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[743ffa6e] | 72 |
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| 73 | bootinfo_t *bootinfo;
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[586262f] | 74 |
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[666773c] | 75 | static uint64_t iosapic_base = 0xfec00000;
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[323a5aaf] | 76 |
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[06f96234] | 77 | /** Performs ia64-specific initialization before main_bsp() is called. */
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[6ecc8bce] | 78 | void arch_pre_main(void)
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| 79 | {
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| 80 | /* Setup usermode init tasks. */
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[743ffa6e] | 81 |
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[6c441cf8] | 82 | unsigned int i;
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| 83 |
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[743ffa6e] | 84 | init.cnt = bootinfo->taskmap.count;
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[6c441cf8] | 85 |
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| 86 | for (i = 0; i < init.cnt; i++) {
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[666773c] | 87 | init.tasks[i].addr =
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| 88 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
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| 89 | VRN_MASK;
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[6c441cf8] | 90 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
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[46db10e9] | 91 | strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
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| 92 | CONFIG_TASK_NAME_BUFLEN);
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[743ffa6e] | 93 | }
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[6ecc8bce] | 94 | }
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| 95 |
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[244f284] | 96 | void arch_pre_mm_init(void)
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| 97 | {
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[666773c] | 98 | /*
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| 99 | * Set Interruption Vector Address (i.e. location of interruption vector
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| 100 | * table).
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| 101 | */
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[7f1c620] | 102 | iva_write((uintptr_t) &ivt);
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[e2ec980f] | 103 | srlz_d();
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| 104 |
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[244f284] | 105 | }
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| 106 |
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[323a5aaf] | 107 | static void iosapic_init(void)
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| 108 | {
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[666773c] | 109 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
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[323a5aaf] | 110 | int i;
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| 111 |
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[2b70a6e] | 112 | int myid, myeid;
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[323a5aaf] | 113 |
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[666773c] | 114 | myid = ia64_get_cpu_id();
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| 115 | myeid = ia64_get_cpu_eid();
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[50b3d30] | 116 |
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[666773c] | 117 | for (i = 0; i < 16; i++) {
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| 118 | if (i == 2)
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| 119 | continue; /* Disable Cascade interrupt */
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| 120 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
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[323a5aaf] | 121 | srlz_d();
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[666773c] | 122 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
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[323a5aaf] | 123 | srlz_d();
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[666773c] | 124 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
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[323a5aaf] | 125 | srlz_d();
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[666773c] | 126 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
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| 127 | myeid << (48 - 32);
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[323a5aaf] | 128 | srlz_d();
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| 129 | }
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| 130 |
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| 131 | }
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| 132 |
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[244f284] | 133 | void arch_post_mm_init(void)
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| 134 | {
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[666773c] | 135 | if (config.cpu_active == 1) {
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[323a5aaf] | 136 | iosapic_init();
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[59e4864] | 137 | irq_init(INR_COUNT, INR_COUNT);
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| 138 | }
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[2270bef] | 139 | it_init();
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[244f284] | 140 | }
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[7453929] | 141 |
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[26678e5] | 142 | void arch_post_cpu_init(void)
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| 143 | {
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| 144 | }
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| 145 |
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[7453929] | 146 | void arch_pre_smp_init(void)
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| 147 | {
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| 148 | }
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| 149 |
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| 150 | void arch_post_smp_init(void)
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| 151 | {
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[49319ac] | 152 | #ifdef SKI
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[2270bef] | 153 | srln_init(stdin);
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| 154 | ski_console_init(&srlnin);
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[49319ac] | 155 | #endif
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[743ffa6e] | 156 |
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| 157 | #ifdef I460GX
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[2270bef] | 158 | #ifdef CONFIG_EGA
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| 159 | ega_init(EGA_BASE, EGA_VIDEORAM);
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| 160 | #endif
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| 161 |
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[4c7257b] | 162 | devno_t devno = device_assign_devno();
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| 163 | inr_t inr;
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[743ffa6e] | 164 |
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[59e4864] | 165 | #ifdef CONFIG_NS16550
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[4c7257b] | 166 | inr = NS16550_IRQ;
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[4c84368e] | 167 | srln_init(stdin);
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| 168 | (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL,
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| 169 | &srlnin);
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[4c7257b] | 170 | sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
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[ff685c9] | 171 | sysinfo_set_item_val("kbd.address.physical", NULL,
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| 172 | (uintptr_t) NS16550_BASE);
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| 173 | sysinfo_set_item_val("kbd.address.kernel", NULL,
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| 174 | (uintptr_t) NS16550_BASE);
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[59e4864] | 175 | #else
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[4c7257b] | 176 | inr = IRQ_KBD;
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[411b6a6] | 177 | kbrd_init(stdin);
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| 178 | (void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
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| 179 | trap_virtual_enable_irqs(1 << inr);
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[4c7257b] | 180 | sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
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[ff685c9] | 181 | sysinfo_set_item_val("kbd.address.physical", NULL,
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| 182 | (uintptr_t) I8042_BASE);
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| 183 | sysinfo_set_item_val("kbd.address.kernel", NULL,
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| 184 | (uintptr_t) I8042_BASE);
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[59e4864] | 185 | #endif
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[4c7257b] | 186 | sysinfo_set_item_val("kbd", NULL, true);
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| 187 | sysinfo_set_item_val("kbd.devno", NULL, devno);
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| 188 | sysinfo_set_item_val("kbd.inr", NULL, inr);
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[743ffa6e] | 189 | #endif
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| 190 |
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[46321fb] | 191 | sysinfo_set_item_val("ia64_iospace", NULL, true);
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| 192 | sysinfo_set_item_val("ia64_iospace.address", NULL, true);
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| 193 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
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[7453929] | 194 | }
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[b994a60] | 195 |
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[59e4864] | 196 |
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[b994a60] | 197 | /** Enter userspace and never return. */
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[0f250f9] | 198 | void userspace(uspace_arg_t *kernel_uarg)
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[b994a60] | 199 | {
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| 200 | psr_t psr;
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| 201 | rsc_t rsc;
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| 202 |
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| 203 | psr.value = psr_read();
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| 204 | psr.cpl = PL_USER;
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[666773c] | 205 | psr.i = true; /* start with interrupts enabled */
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[b994a60] | 206 | psr.ic = true;
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[666773c] | 207 | psr.ri = 0; /* start with instruction #0 */
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| 208 | psr.bn = 1; /* start in bank 0 */
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[b994a60] | 209 |
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[e7b7be3f] | 210 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
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[b994a60] | 211 | rsc.loadrs = 0;
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| 212 | rsc.be = false;
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| 213 | rsc.pl = PL_USER;
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[666773c] | 214 | rsc.mode = 3; /* eager mode */
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[b994a60] | 215 |
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[7f1c620] | 216 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
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[666773c] | 217 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
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| 218 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
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| 219 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
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| 220 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
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[b994a60] | 221 |
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[666773c] | 222 | while (1)
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[b994a60] | 223 | ;
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| 224 | }
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[e1be3b6] | 225 |
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| 226 | /** Set thread-local-storage pointer.
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| 227 | *
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| 228 | * We use r13 (a.k.a. tp) for this purpose.
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| 229 | */
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[7f1c620] | 230 | unative_t sys_tls_set(unative_t addr)
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[e1be3b6] | 231 | {
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| 232 | return 0;
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| 233 | }
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[41d33ac] | 234 |
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| 235 | /** Acquire console back for kernel
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| 236 | *
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| 237 | */
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| 238 | void arch_grab_console(void)
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| 239 | {
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[49319ac] | 240 | #ifdef SKI
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[de57e060] | 241 | ski_kbd_grab();
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[516ff92] | 242 | #endif
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[41d33ac] | 243 | }
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[666773c] | 244 |
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[41d33ac] | 245 | /** Return console to userspace
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| 246 | *
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| 247 | */
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| 248 | void arch_release_console(void)
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| 249 | {
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[49319ac] | 250 | #ifdef SKI
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[de57e060] | 251 | ski_kbd_release();
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[49319ac] | 252 | #endif
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[41d33ac] | 253 | }
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[b45c443] | 254 |
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[f74bbaf] | 255 | void arch_reboot(void)
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| 256 | {
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[013c4d6] | 257 | pio_write_8((ioport8_t *)0x64, 0xfe);
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[666773c] | 258 | while (1)
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| 259 | ;
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[f74bbaf] | 260 | }
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| 261 |
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[6da1013f] | 262 | /** Construct function pointer
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| 263 | *
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| 264 | * @param fptr function pointer structure
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| 265 | * @param addr function address
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| 266 | * @param caller calling function address
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| 267 | *
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| 268 | * @return address of the function pointer
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| 269 | *
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| 270 | */
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| 271 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 272 | {
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| 273 | fptr->fnc = (unative_t) addr;
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| 274 | fptr->gp = ((unative_t *) caller)[1];
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| 275 |
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| 276 | return (void *) fptr;
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| 277 | }
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| 278 |
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[06e1e95] | 279 | /** @}
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[b45c443] | 280 | */
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