source: mainline/kernel/arch/ia64/src/drivers/it.c@ da1bafb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da1bafb was da1bafb, checked in by Martin Decky <martin@…>, 15 years ago

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
  • Property mode set to 100644
File size: 3.7 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35/** Interval Timer driver. */
36
37#include <arch/drivers/it.h>
38#include <arch/interrupt.h>
39#include <arch/register.h>
40#include <arch/asm.h>
41#include <arch/barrier.h>
42#include <time/clock.h>
43#include <ddi/irq.h>
44#include <ddi/device.h>
45#include <arch.h>
46
47#define IT_SERVICE_CLOCKS 64
48
49#define FREQ_NUMERATOR_SHIFT 32
50#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL
51
52#define FREQ_DENOMINATOR_SHIFT 0
53#define FREQ_DENOMINATOR_MASK 0xffffffffULL
54
55uint64_t it_delta;
56
57static irq_t it_irq;
58
59static irq_ownership_t it_claim(irq_t *);
60static void it_interrupt(irq_t *);
61
62/** Initialize Interval Timer. */
63void it_init(void)
64{
65 if (config.cpu_active == 1) {
66 irq_initialize(&it_irq);
67 it_irq.inr = INTERRUPT_TIMER;
68 it_irq.devno = device_assign_devno();
69 it_irq.claim = it_claim;
70 it_irq.handler = it_interrupt;
71 irq_register(&it_irq);
72
73 uint64_t base_freq;
74 base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>
75 FREQ_NUMERATOR_SHIFT;
76 base_freq *= bootinfo->sys_freq;
77 base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>
78 FREQ_DENOMINATOR_SHIFT;
79
80 it_delta = base_freq / HZ;
81 }
82
83 /* Initialize Interval Timer external interrupt vector */
84 cr_itv_t itv;
85
86 itv.value = itv_read();
87 itv.vector = INTERRUPT_TIMER;
88 itv.m = 0;
89 itv_write(itv.value);
90
91 /* Set Interval Timer Counter to zero */
92 itc_write(0);
93
94 /* Generate first Interval Timer interrupt in IT_DELTA ticks */
95 itm_write(IT_DELTA);
96
97 /* Propagate changes */
98 srlz_d();
99}
100
101/** Always claim ownership for this IRQ.
102 *
103 * Other devices are responsible to avoid using INR 0.
104 *
105 * @return Always IRQ_ACCEPT.
106 *
107 */
108irq_ownership_t it_claim(irq_t *irq)
109{
110 return IRQ_ACCEPT;
111}
112
113/** Process Interval Timer interrupt. */
114void it_interrupt(irq_t *irq)
115{
116 eoi_write(EOI);
117
118 int64_t itm = itm_read();
119
120 while (true) {
121 int64_t itc = itc_read();
122 itc += IT_SERVICE_CLOCKS;
123
124 itm += IT_DELTA;
125 if (itm - itc < 0)
126 CPU->missed_clock_ticks++;
127 else
128 break;
129 }
130
131 itm_write(itm);
132 srlz_d(); /* Propagate changes */
133
134 /*
135 * We are holding a lock which prevents preemption.
136 * Release the lock, call clock() and reacquire the lock again.
137 */
138 irq_spinlock_unlock(&irq->lock, false);
139 clock();
140 irq_spinlock_lock(&irq->lock, false);
141}
142
143/** @}
144 */
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