source: mainline/kernel/arch/ia64/src/drivers/it.c@ 59e4864

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 59e4864 was 59e4864, checked in by Jakub Vana <jakub.vana@…>, 17 years ago

Alfa of SMP support on IA64

  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35/** Interval Timer driver. */
36
37#include <arch/drivers/it.h>
38#include <arch/interrupt.h>
39#include <arch/register.h>
40#include <arch/asm.h>
41#include <arch/barrier.h>
42#include <time/clock.h>
43#include <ddi/irq.h>
44#include <ddi/device.h>
45#include <arch.h>
46
47#define IT_SERVICE_CLOCKS 64
48
49static irq_t it_irq;
50
51static irq_ownership_t it_claim(void);
52static void it_interrupt(irq_t *irq, void *arg, ...);
53
54/** Initialize Interval Timer. */
55void it_init(void)
56{
57 cr_itv_t itv;
58
59 if(config.cpu_active==1)
60 {
61 irq_initialize(&it_irq);
62 it_irq.inr = INTERRUPT_TIMER;
63 it_irq.devno = device_assign_devno();
64 it_irq.claim = it_claim;
65 it_irq.handler = it_interrupt;
66 irq_register(&it_irq);
67 }
68
69 /* initialize Interval Timer external interrupt vector */
70 itv.value = itv_read();
71 itv.vector = INTERRUPT_TIMER;
72 itv.m = 0;
73 itv_write(itv.value);
74
75 /* set Interval Timer Counter to zero */
76 itc_write(0);
77
78 /* generate first Interval Timer interrupt in IT_DELTA ticks */
79 itm_write(IT_DELTA);
80
81 /* propagate changes */
82 srlz_d();
83}
84
85/** Always claim ownership for this IRQ.
86 *
87 * Other devices are responsible to avoid using INR 0.
88 *
89 * @return Always IRQ_ACCEPT.
90 */
91irq_ownership_t it_claim(void)
92{
93 return IRQ_ACCEPT;
94}
95
96/** Process Interval Timer interrupt. */
97void it_interrupt(irq_t *irq, void *arg, ...)
98{
99 int64_t c;
100 int64_t m;
101
102 eoi_write(EOI);
103
104 m = itm_read();
105
106 while (1) {
107 c = itc_read();
108 c += IT_SERVICE_CLOCKS;
109
110 m += IT_DELTA;
111 if (m - c < 0)
112 CPU->missed_clock_ticks++;
113 else
114 break;
115 }
116
117 itm_write(m);
118 srlz_d(); /* propagate changes */
119
120 /*
121 * We are holding a lock which prevents preemption.
122 * Release the lock, call clock() and reacquire the lock again.
123 */
124 spinlock_unlock(&irq->lock);
125 clock();
126 spinlock_lock(&irq->lock);
127}
128
129/** @}
130 */
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