| 1 | /*
|
|---|
| 2 | * Copyright (c) 2005 Jakub Jermar
|
|---|
| 3 | * All rights reserved.
|
|---|
| 4 | *
|
|---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
|---|
| 6 | * modification, are permitted provided that the following conditions
|
|---|
| 7 | * are met:
|
|---|
| 8 | *
|
|---|
| 9 | * - Redistributions of source code must retain the above copyright
|
|---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
|---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
|---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
|---|
| 13 | * documentation and/or other materials provided with the distribution.
|
|---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
|---|
| 15 | * derived from this software without specific prior written permission.
|
|---|
| 16 | *
|
|---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| 27 | */
|
|---|
| 28 |
|
|---|
| 29 | /** @addtogroup ia64
|
|---|
| 30 | * @{
|
|---|
| 31 | */
|
|---|
| 32 | /** @file
|
|---|
| 33 | */
|
|---|
| 34 |
|
|---|
| 35 | /** Interval Timer driver. */
|
|---|
| 36 |
|
|---|
| 37 | #include <arch/drivers/it.h>
|
|---|
| 38 | #include <arch/interrupt.h>
|
|---|
| 39 | #include <arch/register.h>
|
|---|
| 40 | #include <arch/asm.h>
|
|---|
| 41 | #include <arch/barrier.h>
|
|---|
| 42 | #include <time/clock.h>
|
|---|
| 43 | #include <ddi/irq.h>
|
|---|
| 44 | #include <ddi/device.h>
|
|---|
| 45 | #include <arch.h>
|
|---|
| 46 |
|
|---|
| 47 | #define IT_SERVICE_CLOCKS 64
|
|---|
| 48 |
|
|---|
| 49 | #define FREQ_NUMERATOR_SHIFT 32
|
|---|
| 50 | #define FREQ_NUMERATOR_MASK 0xffffffff00000000LL
|
|---|
| 51 |
|
|---|
| 52 | #define FREQ_DENOMINATOR_SHIFT 0
|
|---|
| 53 | #define FREQ_DENOMINATOR_MASK 0xffffffffLL
|
|---|
| 54 |
|
|---|
| 55 |
|
|---|
| 56 | uint64_t it_delta;
|
|---|
| 57 |
|
|---|
| 58 |
|
|---|
| 59 | static irq_t it_irq;
|
|---|
| 60 |
|
|---|
| 61 | static irq_ownership_t it_claim(void);
|
|---|
| 62 | static void it_interrupt(irq_t *irq, void *arg, ...);
|
|---|
| 63 |
|
|---|
| 64 | /** Initialize Interval Timer. */
|
|---|
| 65 | void it_init(void)
|
|---|
| 66 | {
|
|---|
| 67 | cr_itv_t itv;
|
|---|
| 68 |
|
|---|
| 69 | if(config.cpu_active==1)
|
|---|
| 70 | {
|
|---|
| 71 | irq_initialize(&it_irq);
|
|---|
| 72 | it_irq.inr = INTERRUPT_TIMER;
|
|---|
| 73 | it_irq.devno = device_assign_devno();
|
|---|
| 74 | it_irq.claim = it_claim;
|
|---|
| 75 | it_irq.handler = it_interrupt;
|
|---|
| 76 | irq_register(&it_irq);
|
|---|
| 77 |
|
|---|
| 78 | uint64_t base_freq;
|
|---|
| 79 | base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >> FREQ_NUMERATOR_SHIFT;
|
|---|
| 80 | base_freq *= bootinfo->sys_freq;
|
|---|
| 81 | base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >> FREQ_DENOMINATOR_SHIFT;
|
|---|
| 82 |
|
|---|
| 83 | it_delta = base_freq /HZ;
|
|---|
| 84 |
|
|---|
| 85 | }
|
|---|
| 86 |
|
|---|
| 87 | /* initialize Interval Timer external interrupt vector */
|
|---|
| 88 | itv.value = itv_read();
|
|---|
| 89 | itv.vector = INTERRUPT_TIMER;
|
|---|
| 90 | itv.m = 0;
|
|---|
| 91 | itv_write(itv.value);
|
|---|
| 92 |
|
|---|
| 93 | /* set Interval Timer Counter to zero */
|
|---|
| 94 | itc_write(0);
|
|---|
| 95 |
|
|---|
| 96 | /* generate first Interval Timer interrupt in IT_DELTA ticks */
|
|---|
| 97 | itm_write(IT_DELTA);
|
|---|
| 98 |
|
|---|
| 99 | /* propagate changes */
|
|---|
| 100 | srlz_d();
|
|---|
| 101 | }
|
|---|
| 102 |
|
|---|
| 103 | /** Always claim ownership for this IRQ.
|
|---|
| 104 | *
|
|---|
| 105 | * Other devices are responsible to avoid using INR 0.
|
|---|
| 106 | *
|
|---|
| 107 | * @return Always IRQ_ACCEPT.
|
|---|
| 108 | */
|
|---|
| 109 | irq_ownership_t it_claim(void)
|
|---|
| 110 | {
|
|---|
| 111 | return IRQ_ACCEPT;
|
|---|
| 112 | }
|
|---|
| 113 |
|
|---|
| 114 | /** Process Interval Timer interrupt. */
|
|---|
| 115 | void it_interrupt(irq_t *irq, void *arg, ...)
|
|---|
| 116 | {
|
|---|
| 117 | int64_t c;
|
|---|
| 118 | int64_t m;
|
|---|
| 119 |
|
|---|
| 120 | eoi_write(EOI);
|
|---|
| 121 |
|
|---|
| 122 | m = itm_read();
|
|---|
| 123 |
|
|---|
| 124 | while (1) {
|
|---|
| 125 | c = itc_read();
|
|---|
| 126 | c += IT_SERVICE_CLOCKS;
|
|---|
| 127 |
|
|---|
| 128 | m += IT_DELTA;
|
|---|
| 129 | if (m - c < 0)
|
|---|
| 130 | CPU->missed_clock_ticks++;
|
|---|
| 131 | else
|
|---|
| 132 | break;
|
|---|
| 133 | }
|
|---|
| 134 |
|
|---|
| 135 | itm_write(m);
|
|---|
| 136 | srlz_d(); /* propagate changes */
|
|---|
| 137 |
|
|---|
| 138 | /*
|
|---|
| 139 | * We are holding a lock which prevents preemption.
|
|---|
| 140 | * Release the lock, call clock() and reacquire the lock again.
|
|---|
| 141 | */
|
|---|
| 142 | spinlock_unlock(&irq->lock);
|
|---|
| 143 | clock();
|
|---|
| 144 | spinlock_lock(&irq->lock);
|
|---|
| 145 | }
|
|---|
| 146 |
|
|---|
| 147 | /** @}
|
|---|
| 148 | */
|
|---|
