source: mainline/kernel/arch/ia64/src/cpu/cpu.c@ eae4e8f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since eae4e8f was eae4e8f, checked in by Jakub Jermar <jakub@…>, 16 years ago

Fix missing includes.

  • Property mode set to 100644
File size: 2.3 KB
RevLine 
[802bb95]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[802bb95]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1bb2e7a]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[d2bb9f8a]35#include <cpu.h>
[0172eba]36#include <arch.h>
37#include <arch/register.h>
38#include <print.h>
[eae4e8f]39#include <memstr.h>
[d2bb9f8a]40
41void cpu_arch_init(void)
42{
43}
44
[0172eba]45void cpu_identify(void)
46{
47 CPU->arch.cpuid0 = cpuid_read(0);
48 CPU->arch.cpuid1 = cpuid_read(1);
49 CPU->arch.cpuid3.value = cpuid_read(3);
50}
[d2bb9f8a]51
[0172eba]52void cpu_print_report(cpu_t *m)
53{
54 char *family_str;
[15819e37]55 char vendor[2 * sizeof(uint64_t) + 1];
[0172eba]56
[38428aa3]57 memcpy(vendor, &CPU->arch.cpuid0, 8);
58 memcpy(vendor + 8, &CPU->arch.cpuid1, 8);
[b60c582]59 vendor[sizeof(vendor) - 1] = 0;
[0172eba]60
[38428aa3]61 switch (m->arch.cpuid3.family) {
[15819e37]62 case FAMILY_ITANIUM:
63 family_str = "Itanium";
[0172eba]64 break;
[15819e37]65 case FAMILY_ITANIUM2:
66 family_str = "Itanium 2";
[0172eba]67 break;
[15819e37]68 default:
69 family_str = "Unknown";
[0172eba]70 break;
71 }
72
[15819e37]73 printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id,
[666773c]74 family_str, vendor, CPU->arch.cpuid3.archrev,
75 CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision);
[0172eba]76}
[b45c443]77
[1bb2e7a]78/** @}
[b45c443]79 */
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