| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <arch/register.h>
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| 30 |
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| 31 | .text
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| 32 | .global memcpy
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| 33 | .global memcpy_from_uspace
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| 34 | .global memcpy_to_uspace
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| 35 | .global memcpy_from_uspace_failover_address
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| 36 | .global memcpy_to_uspace_failover_address
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| 37 |
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| 38 | /** Copy memory from/to userspace.
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| 39 | *
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| 40 | * This memcpy() has been taken from the assembler output of
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| 41 | * the generic _memcpy() and modified to have the failover part.
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| 42 | *
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| 43 | * @param in0 Destination address.
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| 44 | * @param in1 Source address.
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| 45 | * @param in2 Number of byte to copy.
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| 46 | *
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| 47 | */
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| 48 | memcpy:
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| 49 | memcpy_from_uspace:
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| 50 | memcpy_to_uspace:
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| 51 | alloc loc0 = ar.pfs, 3, 1, 0, 0
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| 52 |
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| 53 | adds r14 = 7, in1
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| 54 | mov r2 = ar.lc
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| 55 | mov r8 = in0 ;;
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| 56 | and r14 = -8, r14 ;;
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| 57 | cmp.ne p6, p7 = r14, in1
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| 58 | (p7) br.cond.dpnt 3f ;;
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| 59 |
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| 60 | 0:
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| 61 |
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| 62 | cmp.ne p6, p7 = 0, in2
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| 63 | (p7) br.cond.dpnt 2f ;;
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| 64 | (p6) adds r14 = -1, in2
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| 65 | (p6) mov r16 = r0
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| 66 | (p6) mov r17 = r0 ;;
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| 67 | (p6) mov ar.lc = r14
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| 68 |
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| 69 | 1:
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| 70 |
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| 71 | add r14 = r16, in1
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| 72 | add r15 = r16, in0
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| 73 | adds r17 = 1, r17 ;;
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| 74 | ld1 r14 = [r14]
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| 75 | mov r16 = r17 ;;
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| 76 | st1 [r15] = r14
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| 77 | br.cloop.sptk.few 1b ;;
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| 78 |
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| 79 | 2:
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| 80 |
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| 81 | mov ar.lc = r2
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| 82 | mov ar.pfs = loc0
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| 83 | br.ret.sptk.many rp
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| 84 |
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| 85 | 3:
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| 86 |
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| 87 | adds r14 = 7, in0 ;;
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| 88 | and r14 = -8, r14 ;;
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| 89 | cmp.eq p6, p7 = r14, in0
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| 90 | (p7) br.cond.dptk 0b
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| 91 | shr.u r18 = in2, 3 ;;
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| 92 | cmp.ne p6, p7 = 0, r18
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| 93 | (p7) br.cond.dpnt 5f ;;
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| 94 | (p6) adds r14 = -1, r18
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| 95 | (p6) mov r16 = r0
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| 96 | (p6) mov r17 = r0 ;;
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| 97 | (p6) mov ar.lc = r14
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| 98 |
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| 99 | 4:
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| 100 |
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| 101 | shladd r14 = r16, 3, r0
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| 102 | adds r16 = 1, r17 ;;
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| 103 | add r15 = in1, r14
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| 104 | add r14 = in0, r14
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| 105 | mov r17 = r16 ;;
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| 106 | ld8 r15 = [r15] ;;
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| 107 | st8 [r14] = r15
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| 108 | br.cloop.sptk.few 4b
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| 109 |
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| 110 | 5:
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| 111 |
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| 112 | and r15 = 7, in2
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| 113 | shladd r14 = r18, 3, r0
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| 114 | mov r16 = r0
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| 115 | mov r18 = r0 ;;
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| 116 | cmp.eq p6, p7 = 0, r15
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| 117 | add in0 = r14, in0
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| 118 | adds r15 = -1, r15
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| 119 | add r17 = r14, in1
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| 120 | (p6) br.cond.dpnt 2b ;;
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| 121 | mov ar.lc = r15
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| 122 |
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| 123 | 6:
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| 124 |
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| 125 | add r14 = r16, r17
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| 126 | add r15 = r16, in0
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| 127 | adds r16 = 1, r18 ;;
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| 128 | ld1 r14 = [r14]
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| 129 | mov r18 = r16 ;;
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| 130 | st1 [r15] = r14
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| 131 | br.cloop.sptk.few 6b ;;
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| 132 | mov ar.lc = r2
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| 133 | mov ar.pfs = loc0
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| 134 | br.ret.sptk.many rp
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| 135 |
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| 136 | memcpy_from_uspace_failover_address:
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| 137 | memcpy_to_uspace_failover_address:
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| 138 | /* Return 0 on failure */
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| 139 | mov r8 = r0
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| 140 | mov ar.pfs = loc0
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| 141 | br.ret.sptk.many rp
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| 142 |
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| 143 | .global memsetb
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| 144 | memsetb:
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| 145 | br _memsetb
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| 146 |
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| 147 | .global memsetw
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| 148 | memsetw:
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| 149 | br _memsetw
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| 150 |
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| 151 | .global cpu_halt
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| 152 | cpu_halt:
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| 153 | br cpu_halt
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| 154 |
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| 155 | /** Switch to userspace - low level code.
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| 156 | *
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| 157 | * @param in0 Userspace entry point address.
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| 158 | * @param in1 Userspace stack pointer address.
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| 159 | * @param in2 Userspace register stack pointer address.
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| 160 | * @param in3 Userspace address of thread uspace_arg_t structure.
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| 161 | * @param in4 Value to be stored in IPSR.
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| 162 | * @param in5 Value to be stored in RSC.
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| 163 | *
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| 164 | */
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| 165 | .global switch_to_userspace
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| 166 | switch_to_userspace:
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| 167 | alloc loc0 = ar.pfs, 6, 3, 0, 0
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| 168 |
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| 169 | /* Disable interruption collection and interrupts */
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| 170 | rsm (PSR_IC_MASK | PSR_I_MASK)
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| 171 | srlz.d ;;
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| 172 | srlz.i ;;
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| 173 |
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| 174 | mov cr.ipsr = in4
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| 175 | mov cr.iip = in0
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| 176 | mov r12 = in1
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| 177 |
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| 178 | xor r1 = r1, r1
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| 179 |
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| 180 | /* r2 is defined to hold pcb_ptr - set it to 0 */
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| 181 | xor r2 = r2, r2
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| 182 |
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| 183 | mov loc1 = cr.ifs
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| 184 | movl loc2 = PFM_MASK ;;
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| 185 | and loc1 = loc2, loc1 ;;
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| 186 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */
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| 187 |
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| 188 | invala
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| 189 |
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| 190 | mov loc1 = ar.rsc ;;
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| 191 | and loc1 = ~3, loc1 ;;
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| 192 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */
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| 193 |
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| 194 | flushrs ;;
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| 195 |
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| 196 | mov ar.bspstore = in2 ;;
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| 197 | mov ar.rsc = in5 ;;
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| 198 |
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| 199 | mov r8 = in3
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| 200 |
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| 201 | rfi ;;
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