source: mainline/kernel/arch/ia64/src/asm.S@ 38f6add

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 38f6add was a9d4d2c, checked in by Jakub Jermar <jakub@…>, 17 years ago

Fix ia64 memcpy() broken in the last change.

  • Property mode set to 100644
File size: 4.5 KB
RevLine 
[9db5b66]1#
[df4ed85]2# Copyright (c) 2005 Jakub Jermar
[9db5b66]3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[b994a60]29#include <arch/register.h>
30
[9db5b66]31.text
32
[e3c762cd]33/** Copy memory from/to userspace.
[ffdfcf0]34 *
35 * This memcpy() has been taken from the assembler output of
36 * the generic _memcpy() and modified to have the failover part.
[e3c762cd]37 *
38 * @param in0 Destination address.
39 * @param in1 Source address.
40 * @param in2 Number of byte to copy.
41 */
[9db5b66]42.global memcpy
[e3c762cd]43.global memcpy_from_uspace
44.global memcpy_to_uspace
45.global memcpy_from_uspace_failover_address
46.global memcpy_to_uspace_failover_address
[9db5b66]47memcpy:
[e3c762cd]48memcpy_from_uspace:
49memcpy_to_uspace:
[ffdfcf0]50 alloc loc0 = ar.pfs, 3, 1, 0, 0
51
[e269c53]52 adds r14 = 7, in1
53 mov r2 = ar.lc
[a9d4d2c]54 mov r8 = in0
[e269c53]55 and r14 = -8, r14 ;;
56 cmp.ne p6, p7 = r14, in1
57(p7) br.cond.dpnt 3f ;;
[ffdfcf0]580:
[e269c53]59 cmp.ne p6, p7 = 0, in2
60(p7) br.cond.dpnt 2f ;;
61(p6) adds r14 = -1, in2
62(p6) mov r16 = r0
63(p6) mov r17 = r0 ;;
64(p6) mov ar.lc = r14
[ffdfcf0]651:
[a9d4d2c]66 add r14 = r16, in1
[e269c53]67 add r15 = r16, in0
68 adds r17 = 1, r17 ;;
69 ld1 r14 = [r14]
70 mov r16 = r17 ;;
71 st1 [r15] = r14
72 br.cloop.sptk.few 1b ;;
[ffdfcf0]732:
[e269c53]74 mov ar.lc = r2
75 mov ar.pfs = loc0
76 br.ret.sptk.many rp
773:
78 adds r14 = 7, in0 ;;
79 and r14 = -8, r14 ;;
80 cmp.eq p6, p7 = r14, in0
81(p7) br.cond.dptk 0b
82 shr.u r18 = in2, 3 ;;
83 cmp.ne p6, p7 = 0, r18
84(p7) br.cond.dpnt 5f ;;
85(p6) adds r14 = -1, r18
86(p6) mov r16 = r0
87(p6) mov r17 = r0 ;;
88(p6) mov ar.lc = r14
894:
90 shladd r14 = r16, 3, r0
91 adds r16 = 1, r17 ;;
[a9d4d2c]92 add r15 = in1, r14
[e269c53]93 add r14 = in0, r14
94 mov r17 = r16 ;;
95 ld8 r15 = [r15] ;;
96 st8 [r14] = r15
97 br.cloop.sptk.few 4b
985:
99 and r15 = 7, in2
100 shladd r14 = r18, 3, r0
101 mov r16 = r0
102 mov r18 = r0 ;;
103 cmp.eq p6, p7 = 0, r15
104 add in0 = r14, in0
105 adds r15 = -1, r15
[a9d4d2c]106 add r17 = r14, in1
[e269c53]107(p6) br.cond.dpnt 2b ;;
108 mov ar.lc = r15
1096:
110 add r14 = r16, r17
111 add r15 = r16, in0
112 adds r16 = 1, r18 ;;
[ffdfcf0]113 ld1 r14 = [r14]
[e269c53]114 mov r18 = r16 ;;
[ffdfcf0]115 st1 [r15] = r14
[e269c53]116 br.cloop.sptk.few 6b ;;
117 mov ar.lc = r2
[ffdfcf0]118 mov ar.pfs = loc0
119 br.ret.sptk.many rp
[e3c762cd]120
121memcpy_from_uspace_failover_address:
122memcpy_to_uspace_failover_address:
[ffdfcf0]123 mov r8 = r0 /* return 0 on failure */
124 mov ar.pfs = loc0
125 br.ret.sptk.many rp
[2b50d7c]126
127.global memsetb
128memsetb:
129 br _memsetb
130
131.global cpu_halt
132cpu_halt:
133 br cpu_halt
134
135.global panic_printf
136panic_printf:
137 {
138 br.call.sptk.many b0=printf
139 }
[0d8d27c]140 br halt
[b994a60]141
142/** Switch to userspace - low level code.
143 *
144 * @param in0 Userspace entry point address.
145 * @param in1 Userspace stack pointer address.
146 * @param in2 Userspace register stack pointer address.
[0f250f9]147 * @param in3 Userspace address of thread uspace_arg_t structure.
148 * @param in4 Value to be stored in IPSR.
149 * @param in5 Value to be stored in RSC.
[b994a60]150 */
151.global switch_to_userspace
152switch_to_userspace:
[0f250f9]153 alloc loc0 = ar.pfs, 6, 3, 0, 0
[1065603e]154 rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */
[b994a60]155 srlz.d ;;
156 srlz.i ;;
157
[0f250f9]158 mov cr.ipsr = in4
[b994a60]159 mov cr.iip = in0
160 mov r12 = in1
161
162 xor r1 = r1, r1
163
[c98e6ee]164 /* r2 is defined to hold pcb_ptr - set it to 0 */
165 xor r2 = r2, r2
166
[b994a60]167 mov loc1 = cr.ifs
168 movl loc2 = PFM_MASK ;;
169 and loc1 = loc2, loc1 ;;
170 mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */
171
172 invala
173
174 mov loc1 = ar.rsc ;;
175 and loc1 = ~3, loc1 ;;
176 mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */
177
178 flushrs ;;
179
180 mov ar.bspstore = in2 ;;
[0f250f9]181 mov ar.rsc = in5 ;;
182
183 mov r8 = in3
[b994a60]184
185 rfi ;;
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