source: mainline/kernel/arch/ia64/include/mm/tlb.h@ 5bda2f3e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5bda2f3e was 5bda2f3e, checked in by Martin Decky <martin@…>, 16 years ago

ia64 cleanup and conding style
(no change in functionality)

  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64mm
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia64_TLB_H_
36#define KERN_ia64_TLB_H_
37
38#include <arch/mm/page.h>
39#include <arch/mm/asid.h>
40#include <arch/interrupt.h>
41#include <arch/types.h>
42
43/** Data and instruction Translation Register indices. */
44#define DTR_KERNEL 0
45#define ITR_KERNEL 0
46#define DTR_KSTACK1 4
47#define DTR_KSTACK2 5
48
49/** Portion of TLB insertion format data structure. */
50typedef union {
51 uint64_t word[2];
52 struct {
53 /* Word 0 */
54 unsigned int p : 1; /**< Present. */
55 unsigned int : 1;
56 unsigned int ma : 3; /**< Memory attribute. */
57 unsigned int a : 1; /**< Accessed. */
58 unsigned int d : 1; /**< Dirty. */
59 unsigned int pl : 2; /**< Privilege level. */
60 unsigned int ar : 3; /**< Access rights. */
61 unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */
62 unsigned int : 2;
63 unsigned int ed : 1;
64 unsigned int ig1 : 11;
65
66 /* Word 1 */
67 unsigned int : 2;
68 unsigned int ps : 6; /**< Page size will be 2^ps. */
69 unsigned int key : 24; /**< Protection key, unused. */
70 unsigned int : 32;
71 } __attribute__ ((packed));
72} __attribute__ ((packed)) tlb_entry_t;
73
74extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);
75extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
76extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
77
78extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);
79extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
80extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
81
82extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);
83extern void dtr_purge(uintptr_t page, size_t width);
84
85extern void dtc_pte_copy(pte_t *t);
86extern void itc_pte_copy(pte_t *t);
87
88extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate);
89extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate);
90extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate);
91extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate);
92extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate);
93extern void data_access_bit_fault(uint64_t vector, istate_t *istate);
94extern void data_access_rights_fault(uint64_t vector, istate_t *istate);
95extern void page_not_present(uint64_t vector, istate_t *istate);
96
97#endif
98
99/** @}
100 */
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