source: mainline/kernel/arch/ia64/include/mm/tlb.h@ 925be4e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 925be4e was 925be4e, checked in by Jakub Jermar <jakub@…>, 16 years ago

The ia64 kernel needs to handle the Data Access Rights fault.

  • Property mode set to 100644
File size: 3.8 KB
RevLine 
[ce031f0]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[ce031f0]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64mm
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_ia64_TLB_H_
36#define KERN_ia64_TLB_H_
[ce031f0]37
[bc78c75]38#include <arch/mm/page.h>
39#include <arch/mm/asid.h>
[2c49fbbe]40#include <arch/interrupt.h>
41#include <arch/types.h>
[95042fd]42
[a0d74fd]43/** Data and instruction Translation Register indices. */
44#define DTR_KERNEL 0
45#define ITR_KERNEL 0
[46321fb]46#define DTR_KSTACK1 4
47#define DTR_KSTACK2 5
[a0d74fd]48
49/** Portion of TLB insertion format data structure. */
50union tlb_entry {
[7f1c620]51 uint64_t word[2];
[a0d74fd]52 struct {
53 /* Word 0 */
54 unsigned p : 1; /**< Present. */
55 unsigned : 1;
56 unsigned ma : 3; /**< Memory attribute. */
57 unsigned a : 1; /**< Accessed. */
58 unsigned d : 1; /**< Dirty. */
59 unsigned pl : 2; /**< Privilege level. */
60 unsigned ar : 3; /**< Access rights. */
61 unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */
62 unsigned : 2;
63 unsigned ed : 1;
64 unsigned ig1 : 11;
65
66 /* Word 1 */
67 unsigned : 2;
68 unsigned ps : 6; /**< Page size will be 2^ps. */
69 unsigned key : 24; /**< Protection key, unused. */
70 unsigned : 32;
71 } __attribute__ ((packed));
72} __attribute__ ((packed));
73typedef union tlb_entry tlb_entry_t;
74
[7f1c620]75extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);
76extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
77extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
[95042fd]78
[98000fb]79extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);
80extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
81extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
[95042fd]82
[98000fb]83extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);
84extern void dtr_purge(uintptr_t page, size_t width);
[9ad03fe]85
86extern void dtc_pte_copy(pte_t *t);
87extern void itc_pte_copy(pte_t *t);
[a0d74fd]88
[7f1c620]89extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate);
90extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate);
91extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate);
92extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate);
93extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate);
94extern void data_access_bit_fault(uint64_t vector, istate_t *istate);
[925be4e]95extern void data_access_rights_fault(uint64_t vector, istate_t *istate);
[7f1c620]96extern void page_not_present(uint64_t vector, istate_t *istate);
[bc78c75]97
[ce031f0]98#endif
[b45c443]99
[06e1e95]100/** @}
[b45c443]101 */
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