source: mainline/kernel/arch/ia64/include/istate.h@ ddcc8a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ddcc8a0 was c0699467, checked in by Martin Decky <martin@…>, 14 years ago

do not provide general access to kernel headers from uspace, only allow specific headers to be accessed or shared
externalize headers which serve as kernel/uspace API/ABI into a special tree

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia64_ISTATE_H_
36#define KERN_ia64_ISTATE_H_
37
38#include <trace.h>
39
40#ifdef KERNEL
41
42#include <arch/register.h>
43
44#else /* KERNEL */
45
46#include <libarch/register.h>
47
48#endif /* KERNEL */
49
50typedef struct istate {
51 uint128_t f2;
52 uint128_t f3;
53 uint128_t f4;
54 uint128_t f5;
55 uint128_t f6;
56 uint128_t f7;
57 uint128_t f8;
58 uint128_t f9;
59 uint128_t f10;
60 uint128_t f11;
61 uint128_t f12;
62 uint128_t f13;
63 uint128_t f14;
64 uint128_t f15;
65 uint128_t f16;
66 uint128_t f17;
67 uint128_t f18;
68 uint128_t f19;
69 uint128_t f20;
70 uint128_t f21;
71 uint128_t f22;
72 uint128_t f23;
73 uint128_t f24;
74 uint128_t f25;
75 uint128_t f26;
76 uint128_t f27;
77 uint128_t f28;
78 uint128_t f29;
79 uint128_t f30;
80 uint128_t f31;
81
82 uintptr_t ar_bsp;
83 uintptr_t ar_bspstore;
84 uintptr_t ar_bspstore_new;
85 uint64_t ar_rnat;
86 uint64_t ar_ifs;
87 uint64_t ar_pfs;
88 uint64_t ar_rsc;
89 uintptr_t cr_ifa;
90 cr_isr_t cr_isr;
91 uintptr_t cr_iipa;
92 psr_t cr_ipsr;
93 uintptr_t cr_iip;
94 uint64_t pr;
95 uintptr_t sp;
96
97 /*
98 * The following variables are defined only for break_instruction
99 * handler.
100 */
101 uint64_t in0;
102 uint64_t in1;
103 uint64_t in2;
104 uint64_t in3;
105 uint64_t in4;
106 uint64_t in5;
107 uint64_t in6;
108} istate_t;
109
110NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
111 uintptr_t retaddr)
112{
113 istate->cr_iip = retaddr;
114 istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */
115}
116
117NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
118{
119 return istate->cr_iip;
120}
121
122NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
123{
124 /* FIXME */
125
126 return 0;
127}
128
129NO_TRACE static inline int istate_from_uspace(istate_t *istate)
130{
131 return (istate->cr_iip) < 0xe000000000000000ULL;
132}
133
134#endif
135
136/** @}
137 */
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