source: mainline/kernel/arch/ia64/include/interrupt.h@ 5bda2f3e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5bda2f3e was 5bda2f3e, checked in by Martin Decky <martin@…>, 16 years ago

ia64 cleanup and conding style
(no change in functionality)
  • Property mode set to 100644
File size: 4.1 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia64_INTERRUPT_H_
36#define KERN_ia64_INTERRUPT_H_
37
38#include <arch/types.h>
39#include <arch/register.h>
40
41/** ia64 has 256 INRs. */
42#define INR_COUNT 256
43
44/*
45 * We need to keep this just to compile.
46 * We might eventually move interrupt/ stuff
47 * to genarch.
48 */
49#define IVT_ITEMS 0
50#define IVT_FIRST 0
51
52/** External Interrupt vectors. */
53
54#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0
55
56#define INTERRUPT_SPURIOUS 15
57#define INTERRUPT_TIMER 255
58
59#define LEGACY_INTERRUPT_BASE 0x20
60
61#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE)
62#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE)
63
64/** General Exception codes. */
65#define GE_ILLEGALOP 0
66#define GE_PRIVOP 1
67#define GE_PRIVREG 2
68#define GE_RESREGFLD 3
69#define GE_DISBLDISTRAN 4
70#define GE_ILLEGALDEP 8
71
72#define EOI 0 /**< The actual value doesn't matter. */
73
74typedef struct {
75 uint128_t f2;
76 uint128_t f3;
77 uint128_t f4;
78 uint128_t f5;
79 uint128_t f6;
80 uint128_t f7;
81 uint128_t f8;
82 uint128_t f9;
83 uint128_t f10;
84 uint128_t f11;
85 uint128_t f12;
86 uint128_t f13;
87 uint128_t f14;
88 uint128_t f15;
89 uint128_t f16;
90 uint128_t f17;
91 uint128_t f18;
92 uint128_t f19;
93 uint128_t f20;
94 uint128_t f21;
95 uint128_t f22;
96 uint128_t f23;
97 uint128_t f24;
98 uint128_t f25;
99 uint128_t f26;
100 uint128_t f27;
101 uint128_t f28;
102 uint128_t f29;
103 uint128_t f30;
104 uint128_t f31;
105
106 uintptr_t ar_bsp;
107 uintptr_t ar_bspstore;
108 uintptr_t ar_bspstore_new;
109 uint64_t ar_rnat;
110 uint64_t ar_ifs;
111 uint64_t ar_pfs;
112 uint64_t ar_rsc;
113 uintptr_t cr_ifa;
114 cr_isr_t cr_isr;
115 uintptr_t cr_iipa;
116 psr_t cr_ipsr;
117 uintptr_t cr_iip;
118 uint64_t pr;
119 uintptr_t sp;
120
121 /*
122 * The following variables are defined only for break_instruction
123 * handler.
124 */
125 uint64_t in0;
126 uint64_t in1;
127 uint64_t in2;
128 uint64_t in3;
129 uint64_t in4;
130 uint64_t in5;
131 uint64_t in6;
132} istate_t;
133
134static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
135{
136 istate->cr_iip = retaddr;
137 istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */
138}
139
140static inline unative_t istate_get_pc(istate_t *istate)
141{
142 return istate->cr_iip;
143}
144
145static inline int istate_from_uspace(istate_t *istate)
146{
147 return (istate->cr_iip) < 0xe000000000000000ULL;
148}
149
150extern void *ivt;
151
152extern void general_exception(uint64_t vector, istate_t *istate);
153extern int break_instruction(uint64_t vector, istate_t *istate);
154extern void universal_handler(uint64_t vector, istate_t *istate);
155extern void nop_handler(uint64_t vector, istate_t *istate);
156extern void external_interrupt(uint64_t vector, istate_t *istate);
157extern void disabled_fp_register(uint64_t vector, istate_t *istate);
158
159extern void trap_virtual_enable_irqs(uint16_t irqmask);
160
161#endif
162
163/** @}
164 */
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