source: mainline/kernel/arch/ia64/include/context.h@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.

  • Property mode set to 100644
File size: 3.2 KB
RevLine 
[30ef8ce]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_ia64_CONTEXT_H_
36#define KERN_ia64_CONTEXT_H_
[30ef8ce]37
38#include <arch/types.h>
[b994a60]39#include <arch/register.h>
[4b2c872d]40#include <typedefs.h>
[e0cdb7b6]41#include <align.h>
[17a20bc]42#include <arch/stack.h>
[1fbbcd6]43
[6b96ab44]44/*
[b6d4566]45 * context_save_arch() and context_restore_arch() are both leaf procedures.
[6b96ab44]46 * No need to allocate scratch area.
[1fbbcd6]47 *
48 * One item is put onto the stack to support get_stack_base().
[6b96ab44]49 */
[b87f418]50#define SP_DELTA (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
[7f1bfce]51
[d5d2a3f]52#ifdef context_set
53#undef context_set
54#endif
55
[b6d4566]56/* RSE stack starts at the bottom of memory stack. */
57#define context_set(c, _pc, stack, size) \
58 do { \
[7f1c620]59 (c)->pc = (uintptr_t) _pc; \
60 (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT); \
[b6d4566]61 (c)->ar_pfs &= PFM_MASK; \
[7f1c620]62 (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA; \
[b6d4566]63 } while (0);
[d5d2a3f]64
[7b43e11]65/*
66 * Only save registers that must be preserved across
67 * function calls.
68 */
[30ef8ce]69struct context {
[32a89bf]70
71 /*
72 * Application registers
73 */
[7f1c620]74 uint64_t ar_pfs;
75 uint64_t ar_unat_caller;
76 uint64_t ar_unat_callee;
77 uint64_t ar_rsc;
78 uintptr_t bsp; /* ar_bsp */
79 uint64_t ar_rnat;
80 uint64_t ar_lc;
[1eee8383]81
[6b96ab44]82 /*
83 * General registers
84 */
[7f1c620]85 uint64_t r1;
86 uint64_t r4;
87 uint64_t r5;
88 uint64_t r6;
89 uint64_t r7;
90 uintptr_t sp; /* r12 */
91 uint64_t r13;
[6b96ab44]92
93 /*
94 * Branch registers
95 */
[7f1c620]96 uintptr_t pc; /* b0 */
97 uint64_t b1;
98 uint64_t b2;
99 uint64_t b3;
100 uint64_t b4;
101 uint64_t b5;
[6b96ab44]102
103 /*
104 * Predicate registers
105 */
[7f1c620]106 uint64_t pr;
[41fa6f2]107
108 __r128 f2 __attribute__ ((aligned(16)));
109 __r128 f3;
110 __r128 f4;
111 __r128 f5;
112
113 __r128 f16;
114 __r128 f17;
115 __r128 f18;
116 __r128 f19;
117 __r128 f20;
118 __r128 f21;
119 __r128 f22;
120 __r128 f23;
121 __r128 f24;
122 __r128 f25;
123 __r128 f26;
124 __r128 f27;
125 __r128 f28;
126 __r128 f29;
127 __r128 f30;
128 __r128 f31;
[6b96ab44]129
[22f7769]130 ipl_t ipl;
[1065603e]131};
[30ef8ce]132
133#endif
[b45c443]134
[06e1e95]135/** @}
[b45c443]136 */
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