source: mainline/kernel/arch/ia64/include/barrier.h@ d5087aa

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d5087aa was d5087aa, checked in by Jakub Jermar <jakub@…>, 17 years ago

Add smc_coherence_block().

  • Property mode set to 100644
File size: 2.4 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia64_BARRIER_H_
36#define KERN_ia64_BARRIER_H_
37
38/*
39 * TODO: Implement true IA-64 memory barriers for macros below.
40 */
41#define CS_ENTER_BARRIER() memory_barrier()
42#define CS_LEAVE_BARRIER() memory_barrier()
43
44#define memory_barrier() asm volatile ("mf\n" ::: "memory")
45#define read_barrier() memory_barrier()
46#define write_barrier() memory_barrier()
47
48#define srlz_i() \
49 asm volatile (";; srlz.i ;;\n" ::: "memory")
50#define srlz_d() \
51 asm volatile (";; srlz.d\n" ::: "memory")
52
53#define fc_i(a) \
54 asm volatile ("fc.i %0\n" : "r" ((a)) :: "memory")
55#define sync_i() \
56 asm volatile (";; sync.i\n" ::: "memory")
57
58#define smc_coherence(a) \
59{ \
60 fc_i((a)); \
61 sync_i(); \
62 srlz_i(); \
63}
64
65#define FC_INVAL_MIN 32
66#define smc_coherence_block(a, l) \
67{ \
68 unsigned long i; \
69 for (i = 0; i < (l); i += FC_INVAL_MIN) \
70 fc_i((void *)(a) + i); \
71 sync_i(); \
72 srlz_i(); \
73}
74
75#endif
76
77/** @}
78 */
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