source: mainline/kernel/arch/ia64/include/barrier.h@ ddcc8a0

/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/** @addtogroup ia64    
 * @{
 */
/** @file
 */

#ifndef KERN_ia64_BARRIER_H_
#define KERN_ia64_BARRIER_H_

/*
 * TODO: Implement true IA-64 memory barriers for macros below.
 */
#define CS_ENTER_BARRIER()      memory_barrier()
#define CS_LEAVE_BARRIER()      memory_barrier()

#define memory_barrier()        asm volatile ("mf\n" ::: "memory")
#define read_barrier()          memory_barrier()
#define write_barrier()         memory_barrier()

#define srlz_i()                \
        asm volatile (";; srlz.i ;;\n" ::: "memory")
#define srlz_d()                \
        asm volatile (";; srlz.d\n" ::: "memory")

#define fc_i(a)                 \
        asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory")  
#define sync_i()                \
        asm volatile (";; sync.i\n" ::: "memory")

#define smc_coherence(a)        \
{                               \
        fc_i((a));              \
        sync_i();               \
        srlz_i();               \
}

#define FC_INVAL_MIN            32
#define smc_coherence_block(a, l)               \
{                                               \
        unsigned long i;                        \
        for (i = 0; i < (l); i += FC_INVAL_MIN) \
                fc_i((void *)(a) + i);          \
        sync_i();                               \
        srlz_i();                               \
}

#endif

/** @}
 */