| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup ia64
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #ifndef KERN_ia64_ATOMIC_H_
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| 36 | #define KERN_ia64_ATOMIC_H_
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| 37 |
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| 38 | #include <trace.h>
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| 39 |
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| 40 | NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val)
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| 41 | {
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| 42 | atomic_count_t v;
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| 43 |
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| 44 | asm volatile (
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| 45 | "movl %[v] = 0x1;;\n"
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| 46 | "xchg8 %[v] = %[count], %[v];;\n"
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| 47 | : [v] "=r" (v),
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| 48 | [count] "+m" (val->count)
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| 49 | );
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| 50 |
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| 51 | return v;
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| 52 | }
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| 53 |
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| 54 | NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
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| 55 | {
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| 56 | do {
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| 57 | while (val->count);
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| 58 | } while (test_and_set(val));
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| 59 | }
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| 60 |
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| 61 | NO_TRACE static inline void atomic_inc(atomic_t *val)
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| 62 | {
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| 63 | atomic_count_t v;
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| 64 |
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| 65 | asm volatile (
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| 66 | "fetchadd8.rel %[v] = %[count], 1\n"
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| 67 | : [v] "=r" (v),
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| 68 | [count] "+m" (val->count)
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| 69 | );
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| 70 | }
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| 71 |
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| 72 | NO_TRACE static inline void atomic_dec(atomic_t *val)
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| 73 | {
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| 74 | atomic_count_t v;
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| 75 |
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| 76 | asm volatile (
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| 77 | "fetchadd8.rel %[v] = %[count], -1\n"
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| 78 | : [v] "=r" (v),
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| 79 | [count] "+m" (val->count)
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| 80 | );
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| 81 | }
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| 82 |
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| 83 | NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val)
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| 84 | {
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| 85 | atomic_count_t v;
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| 86 |
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| 87 | asm volatile (
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| 88 | "fetchadd8.rel %[v] = %[count], 1\n"
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| 89 | : [v] "=r" (v),
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| 90 | [count] "+m" (val->count)
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| 91 | );
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| 92 |
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| 93 | return (v + 1);
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| 94 | }
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| 95 |
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| 96 | NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val)
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| 97 | {
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| 98 | atomic_count_t v;
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| 99 |
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| 100 | asm volatile (
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| 101 | "fetchadd8.rel %[v] = %[count], -1\n"
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| 102 | : [v] "=r" (v),
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| 103 | [count] "+m" (val->count)
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| 104 | );
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| 105 |
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| 106 | return (v - 1);
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| 107 | }
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| 108 |
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| 109 | NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val)
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| 110 | {
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| 111 | atomic_count_t v;
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| 112 |
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| 113 | asm volatile (
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| 114 | "fetchadd8.rel %[v] = %[count], 1\n"
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| 115 | : [v] "=r" (v),
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| 116 | [count] "+m" (val->count)
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| 117 | );
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| 118 |
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| 119 | return v;
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| 120 | }
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| 121 |
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| 122 | NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val)
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| 123 | {
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| 124 | atomic_count_t v;
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| 125 |
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| 126 | asm volatile (
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| 127 | "fetchadd8.rel %[v] = %[count], -1\n"
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| 128 | : [v] "=r" (v),
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| 129 | [count] "+m" (val->count)
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| 130 | );
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| 131 |
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| 132 | return v;
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| 133 | }
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| 134 |
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| 135 | #endif
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| 136 |
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| 137 | /** @}
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| 138 | */
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