source: mainline/kernel/arch/ia64/include/atomic.h@ a71c158

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a71c158 was 7038f55, checked in by Jakub Jermar <jakub@…>, 16 years ago

Add simple atomic_lock_arch() for ia64

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia64_ATOMIC_H_
36#define KERN_ia64_ATOMIC_H_
37
38/** Atomic addition.
39 *
40 * @param val Atomic value.
41 * @param imm Value to add.
42 *
43 * @return Value before addition.
44 */
45static inline long atomic_add(atomic_t *val, int imm)
46{
47 long v;
48
49 asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v),
50 "+m" (val->count) : "i" (imm));
51
52 return v;
53}
54
55static inline uint64_t test_and_set(atomic_t *val)
56{
57 uint64_t v;
58
59 asm volatile (
60 "movl %0 = 0x1;;\n"
61 "xchg8 %0 = %1, %0;;\n"
62 : "=r" (v), "+m" (val->count)
63 );
64
65 return v;
66}
67
68static inline void atomic_lock_arch(atomic_t *val)
69{
70 do {
71 while (val->count)
72 ;
73 } while (test_and_set(val));
74}
75
76static inline void atomic_inc(atomic_t *val)
77{
78 atomic_add(val, 1);
79}
80
81static inline void atomic_dec(atomic_t *val)
82{
83 atomic_add(val, -1);
84}
85
86static inline long atomic_preinc(atomic_t *val)
87{
88 return atomic_add(val, 1) + 1;
89}
90
91static inline long atomic_predec(atomic_t *val)
92{
93 return atomic_add(val, -1) - 1;
94}
95
96static inline long atomic_postinc(atomic_t *val)
97{
98 return atomic_add(val, 1);
99}
100
101static inline long atomic_postdec(atomic_t *val)
102{
103 return atomic_add(val, -1);
104}
105
106#endif
107
108/** @}
109 */
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