[b0bf501] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[b0bf501] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup ia64
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[06e1e95] | 35 | #ifndef KERN_ia64_ATOMIC_H_
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| 36 | #define KERN_ia64_ATOMIC_H_
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[b0bf501] | 37 |
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[10c071e] | 38 | /** Atomic addition.
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| 39 | *
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| 40 | * @param val Atomic value.
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| 41 | * @param imm Value to add.
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| 42 | *
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[9a2d6e1] | 43 | * @return Value before addition.
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[10c071e] | 44 | */
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[23684b7] | 45 | static inline long atomic_add(atomic_t *val, int imm)
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[59e07c91] | 46 | {
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[23684b7] | 47 | long v;
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[59e07c91] | 48 |
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[e7b7be3f] | 49 | asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
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[73a4bab] | 50 |
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[59e07c91] | 51 | return v;
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[b0bf501] | 52 | }
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| 53 |
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[59e4864] | 54 |
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| 55 | static inline uint64_t test_and_set(atomic_t *val) {
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| 56 | uint64_t v;
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| 57 |
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| 58 | asm volatile (
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| 59 | "movl %0=0x01;;\n"
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| 60 | "xchg8 %0=%1,%0;;\n"
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| 61 | : "=r" (v),"+m" (val->count)
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| 62 | );
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| 63 |
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| 64 | return v;
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| 65 | }
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| 66 |
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| 67 |
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[73a4bab] | 68 | static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
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| 69 | static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
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| 70 |
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[23684b7] | 71 | static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
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| 72 | static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
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[73a4bab] | 73 |
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[23684b7] | 74 | static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
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| 75 | static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
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[59e07c91] | 76 |
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[b0bf501] | 77 | #endif
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[b45c443] | 78 |
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[06e1e95] | 79 | /** @}
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[b45c443] | 80 | */
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