source: mainline/kernel/arch/ia32xen/src/ia32xen.c@ 24345a5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 24345a5 was e32e092, checked in by Jiri Svoboda <jirik.svoboda@…>, 17 years ago

Declare arguments for memstr.h operations as pointers instead of uintptr_t.

  • Property mode set to 100644
File size: 5.3 KB
RevLine 
[0356274]1/*
[df4ed85]2 * Copyright (c) 2006 Martin Decky
[0356274]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[57ce359]29/** @addtogroup ia32xen
[0356274]30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
[deaa22f]36#include <main/main.h>
[0356274]37
38#include <arch/types.h>
[e12ccc5]39#include <align.h>
[0356274]40
41#include <arch/pm.h>
42
[aecf79f]43#include <arch/drivers/xconsole.h>
[e12ccc5]44#include <arch/mm/page.h>
[0356274]45
46#include <arch/context.h>
47
48#include <config.h>
49
50#include <arch/interrupt.h>
51#include <arch/asm.h>
52#include <genarch/acpi/acpi.h>
53
54#include <arch/bios/bios.h>
55
56#include <interrupt.h>
57#include <arch/debugger.h>
58#include <proc/thread.h>
59#include <syscall/syscall.h>
60#include <console/console.h>
[ec04b20]61#include <ddi/irq.h>
[0356274]62
[4965a846]63start_info_t start_info;
[e12ccc5]64memzone_t meminfo;
65
[7d3d641]66extern void xen_callback(void);
67extern void xen_failsafe_callback(void);
68
[e12ccc5]69void arch_pre_main(void)
70{
71 pte_t pte;
[e32e092]72 memsetb(&pte, sizeof(pte), 0);
[e12ccc5]73
74 pte.present = 1;
75 pte.writeable = 1;
76 pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
[8cd140f2]77 ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
[e12ccc5]78
[8cd140f2]79 if (!(start_info.flags & SIF_INITDOMAIN)) {
80 /* Map console frame */
81 pte.present = 1;
82 pte.writeable = 1;
83 pte.frame_address = start_info.console.domU.mfn;
84 ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
85 } else
86 start_info.console.domU.evtchn = 0;
[adf7f9c]87
[8cd140f2]88 ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
[7d3d641]89
[e12ccc5]90 /* Create identity mapping */
91
92 meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
93 meminfo.size = start_info.frames - meminfo.start;
94 meminfo.reserved = 0;
[8cd140f2]95
[e12ccc5]96 uintptr_t pa;
97 index_t last_ptl0 = 0;
98 for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
99 uintptr_t va = PA2KA(pa);
100
101 if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
102 /* New page directory entry needed */
103 uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
104 uintptr_t tva = PA2KA(tpa);
105
[e32e092]106 memsetb((void *) tva, PAGE_SIZE, 0);
[e12ccc5]107
108 pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
[8cd140f2]109 SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
[e12ccc5]110 SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
[8cd140f2]111 SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
[e12ccc5]112
113 last_ptl0 = PTL0_INDEX(va);
114 meminfo.reserved++;
115 }
116
117 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
118
119 SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
120 SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE);
121 }
[bf78569]122
123 /* Put initial stack safely in the mapped area */
124 stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
[e12ccc5]125}
[4965a846]126
[0356274]127void arch_pre_mm_init(void)
128{
[aecf79f]129 pm_init();
[0356274]130
131 if (config.cpu_active == 1) {
[ec04b20]132 interrupt_init();
[0356274]133// bios_init();
134
135 }
136}
137
138void arch_post_mm_init(void)
139{
140 if (config.cpu_active == 1) {
[ec04b20]141 /* Initialize IRQ routing */
142 irq_init(IRQ_COUNT, IRQ_COUNT);
143
144 /* Video */
[aecf79f]145 xen_console_init();
[ec04b20]146
[0356274]147 /* Enable debugger */
148 debugger_init();
[ec04b20]149
[0356274]150 /* Merge all memory zones to 1 big zone */
151 zone_merge_all();
152 }
153}
154
[26678e5]155void arch_post_cpu_init(void)
156{
157}
158
[0356274]159void arch_pre_smp_init(void)
160{
161 if (config.cpu_active == 1) {
[f619ec11]162#ifdef CONFIG_SMP
[0356274]163 acpi_init();
[f619ec11]164#endif /* CONFIG_SMP */
[0356274]165 }
166}
167
168void arch_post_smp_init(void)
169{
170}
171
172void calibrate_delay_loop(void)
173{
[aecf79f]174// i8254_calibrate_delay_loop();
[0356274]175 if (config.cpu_active == 1) {
176 /*
177 * This has to be done only on UP.
178 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
179 */
[aecf79f]180// i8254_normal_operation();
[0356274]181 }
182}
183
184/** Set thread-local-storage pointer
185 *
186 * TLS pointer is set in GS register. That means, the GS contains
187 * selector, and the descriptor->base is the correct address.
188 */
189unative_t sys_tls_set(unative_t addr)
190{
191 THREAD->arch.tls = addr;
192 set_tls_desc(addr);
193
194 return 0;
195}
196
197/** Acquire console back for kernel
198 *
199 */
200void arch_grab_console(void)
201{
202}
[aecf79f]203
[0356274]204/** Return console to userspace
205 *
206 */
207void arch_release_console(void)
208{
209}
210
[f74bbaf]211void arch_reboot(void)
212{
213 // TODO
214 while (1);
215}
216
[0356274]217/** @}
218 */
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