source: mainline/kernel/arch/ia32xen/src/ia32xen.c@ 0af7a09

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0af7a09 was 8cd140f2, checked in by Martin Decky <martin@…>, 19 years ago

update for Xen

  • Property mode set to 100644
File size: 5.3 KB
RevLine 
[0356274]1/*
[e2882a7]2 * Copyright (C) 2006 Martin Decky
[0356274]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[57ce359]29/** @addtogroup ia32xen
[0356274]30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
[deaa22f]36#include <main/main.h>
[0356274]37
38#include <arch/types.h>
39#include <typedefs.h>
[e12ccc5]40#include <align.h>
[0356274]41
42#include <arch/pm.h>
43
[aecf79f]44#include <arch/drivers/xconsole.h>
[e12ccc5]45#include <arch/mm/page.h>
[0356274]46
47#include <arch/context.h>
48
49#include <config.h>
50
51#include <arch/interrupt.h>
52#include <arch/asm.h>
53#include <genarch/acpi/acpi.h>
54
55#include <arch/bios/bios.h>
56
[4965a846]57#include <arch/boot/boot.h>
[0356274]58#include <arch/mm/memory_init.h>
59#include <interrupt.h>
60#include <arch/debugger.h>
61#include <proc/thread.h>
62#include <syscall/syscall.h>
63#include <console/console.h>
[ec04b20]64#include <ddi/irq.h>
[0356274]65
[4965a846]66start_info_t start_info;
[e12ccc5]67memzone_t meminfo;
68
[7d3d641]69extern void xen_callback(void);
70extern void xen_failsafe_callback(void);
71
[e12ccc5]72void arch_pre_main(void)
73{
74 pte_t pte;
75 memsetb((uintptr_t) &pte, sizeof(pte), 0);
76
77 pte.present = 1;
78 pte.writeable = 1;
79 pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
[8cd140f2]80 ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
[e12ccc5]81
[8cd140f2]82 if (!(start_info.flags & SIF_INITDOMAIN)) {
83 /* Map console frame */
84 pte.present = 1;
85 pte.writeable = 1;
86 pte.frame_address = start_info.console.domU.mfn;
87 ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
88 } else
89 start_info.console.domU.evtchn = 0;
[adf7f9c]90
[8cd140f2]91 ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
[7d3d641]92
[e12ccc5]93 /* Create identity mapping */
94
95 meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
96 meminfo.size = start_info.frames - meminfo.start;
97 meminfo.reserved = 0;
[8cd140f2]98
[e12ccc5]99 uintptr_t pa;
100 index_t last_ptl0 = 0;
101 for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
102 uintptr_t va = PA2KA(pa);
103
104 if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
105 /* New page directory entry needed */
106 uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
107 uintptr_t tva = PA2KA(tpa);
108
109 memsetb(tva, PAGE_SIZE, 0);
110
111 pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
[8cd140f2]112 SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
[e12ccc5]113 SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
[8cd140f2]114 SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
[e12ccc5]115
116 last_ptl0 = PTL0_INDEX(va);
117 meminfo.reserved++;
118 }
119
120 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
121
122 SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
123 SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE);
124 }
[bf78569]125
126 /* Put initial stack safely in the mapped area */
127 stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
[e12ccc5]128}
[4965a846]129
[0356274]130void arch_pre_mm_init(void)
131{
[aecf79f]132 pm_init();
[0356274]133
134 if (config.cpu_active == 1) {
[ec04b20]135 interrupt_init();
[0356274]136// bios_init();
137
138 }
139}
140
141void arch_post_mm_init(void)
142{
143 if (config.cpu_active == 1) {
[ec04b20]144 /* Initialize IRQ routing */
145 irq_init(IRQ_COUNT, IRQ_COUNT);
146
147 /* Video */
[aecf79f]148 xen_console_init();
[ec04b20]149
[0356274]150 /* Enable debugger */
151 debugger_init();
[ec04b20]152
[0356274]153 /* Merge all memory zones to 1 big zone */
154 zone_merge_all();
155 }
156}
157
[26678e5]158void arch_post_cpu_init(void)
159{
160}
161
[0356274]162void arch_pre_smp_init(void)
163{
164 if (config.cpu_active == 1) {
165 memory_print_map();
166
167 #ifdef CONFIG_SMP
168 acpi_init();
169 #endif /* CONFIG_SMP */
170 }
171}
172
173void arch_post_smp_init(void)
174{
175}
176
177void calibrate_delay_loop(void)
178{
[aecf79f]179// i8254_calibrate_delay_loop();
[0356274]180 if (config.cpu_active == 1) {
181 /*
182 * This has to be done only on UP.
183 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
184 */
[aecf79f]185// i8254_normal_operation();
[0356274]186 }
187}
188
189/** Set thread-local-storage pointer
190 *
191 * TLS pointer is set in GS register. That means, the GS contains
192 * selector, and the descriptor->base is the correct address.
193 */
194unative_t sys_tls_set(unative_t addr)
195{
196 THREAD->arch.tls = addr;
197 set_tls_desc(addr);
198
199 return 0;
200}
201
202/** Acquire console back for kernel
203 *
204 */
205void arch_grab_console(void)
206{
207}
[aecf79f]208
[0356274]209/** Return console to userspace
210 *
211 */
212void arch_release_console(void)
213{
214}
215
216/** @}
217 */
Note: See TracBrowser for help on using the repository browser.