[0356274] | 1 | /*
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[e2882a7] | 2 | * Copyright (C) 2006 Martin Decky
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[0356274] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[57ce359] | 29 | /** @addtogroup ia32xen
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[0356274] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #include <arch.h>
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[deaa22f] | 36 | #include <main/main.h>
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[0356274] | 37 |
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| 38 | #include <arch/types.h>
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| 39 | #include <typedefs.h>
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[e12ccc5] | 40 | #include <align.h>
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[0356274] | 41 |
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| 42 | #include <arch/pm.h>
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| 43 |
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[aecf79f] | 44 | #include <arch/drivers/xconsole.h>
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[e12ccc5] | 45 | #include <arch/mm/page.h>
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[0356274] | 46 |
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| 47 | #include <arch/context.h>
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| 48 |
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| 49 | #include <config.h>
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| 50 |
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| 51 | #include <arch/interrupt.h>
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| 52 | #include <arch/asm.h>
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| 53 | #include <genarch/acpi/acpi.h>
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| 54 |
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| 55 | #include <arch/bios/bios.h>
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| 56 |
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[4965a846] | 57 | #include <arch/boot/boot.h>
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[0356274] | 58 | #include <arch/mm/memory_init.h>
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| 59 | #include <interrupt.h>
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| 60 | #include <arch/debugger.h>
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| 61 | #include <proc/thread.h>
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| 62 | #include <syscall/syscall.h>
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| 63 | #include <console/console.h>
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[ec04b20] | 64 | #include <ddi/irq.h>
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[0356274] | 65 |
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[4965a846] | 66 | start_info_t start_info;
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[e12ccc5] | 67 | memzone_t meminfo;
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| 68 |
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[7d3d641] | 69 | extern void xen_callback(void);
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| 70 | extern void xen_failsafe_callback(void);
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| 71 |
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[e12ccc5] | 72 | void arch_pre_main(void)
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| 73 | {
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| 74 | pte_t pte;
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| 75 | memsetb((uintptr_t) &pte, sizeof(pte), 0);
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| 76 |
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| 77 | pte.present = 1;
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| 78 | pte.writeable = 1;
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| 79 | pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
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[8cd140f2] | 80 | ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
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[e12ccc5] | 81 |
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[8cd140f2] | 82 | if (!(start_info.flags & SIF_INITDOMAIN)) {
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| 83 | /* Map console frame */
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| 84 | pte.present = 1;
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| 85 | pte.writeable = 1;
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| 86 | pte.frame_address = start_info.console.domU.mfn;
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| 87 | ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
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| 88 | } else
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| 89 | start_info.console.domU.evtchn = 0;
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[adf7f9c] | 90 |
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[8cd140f2] | 91 | ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
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[7d3d641] | 92 |
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[e12ccc5] | 93 | /* Create identity mapping */
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| 94 |
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| 95 | meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
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| 96 | meminfo.size = start_info.frames - meminfo.start;
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| 97 | meminfo.reserved = 0;
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[8cd140f2] | 98 |
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[e12ccc5] | 99 | uintptr_t pa;
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| 100 | index_t last_ptl0 = 0;
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| 101 | for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
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| 102 | uintptr_t va = PA2KA(pa);
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| 103 |
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| 104 | if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
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| 105 | /* New page directory entry needed */
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| 106 | uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
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| 107 | uintptr_t tva = PA2KA(tpa);
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| 108 |
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| 109 | memsetb(tva, PAGE_SIZE, 0);
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| 110 |
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| 111 | pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
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[8cd140f2] | 112 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
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[e12ccc5] | 113 | SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
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[8cd140f2] | 114 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
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[e12ccc5] | 115 |
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| 116 | last_ptl0 = PTL0_INDEX(va);
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| 117 | meminfo.reserved++;
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| 118 | }
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| 119 |
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| 120 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
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| 121 |
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| 122 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
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| 123 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE);
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| 124 | }
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[bf78569] | 125 |
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| 126 | /* Put initial stack safely in the mapped area */
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| 127 | stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
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[e12ccc5] | 128 | }
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[4965a846] | 129 |
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[0356274] | 130 | void arch_pre_mm_init(void)
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| 131 | {
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[aecf79f] | 132 | pm_init();
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[0356274] | 133 |
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| 134 | if (config.cpu_active == 1) {
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[ec04b20] | 135 | interrupt_init();
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[0356274] | 136 | // bios_init();
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| 137 |
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| 138 | }
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| 139 | }
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| 140 |
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| 141 | void arch_post_mm_init(void)
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| 142 | {
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| 143 | if (config.cpu_active == 1) {
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[ec04b20] | 144 | /* Initialize IRQ routing */
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| 145 | irq_init(IRQ_COUNT, IRQ_COUNT);
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| 146 |
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| 147 | /* Video */
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[aecf79f] | 148 | xen_console_init();
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[ec04b20] | 149 |
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[0356274] | 150 | /* Enable debugger */
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| 151 | debugger_init();
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[ec04b20] | 152 |
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[0356274] | 153 | /* Merge all memory zones to 1 big zone */
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| 154 | zone_merge_all();
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| 155 | }
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| 156 | }
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| 157 |
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[26678e5] | 158 | void arch_post_cpu_init(void)
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| 159 | {
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| 160 | }
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| 161 |
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[0356274] | 162 | void arch_pre_smp_init(void)
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| 163 | {
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| 164 | if (config.cpu_active == 1) {
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| 165 | memory_print_map();
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| 166 |
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| 167 | #ifdef CONFIG_SMP
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| 168 | acpi_init();
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| 169 | #endif /* CONFIG_SMP */
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| 170 | }
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| 171 | }
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| 172 |
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| 173 | void arch_post_smp_init(void)
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| 174 | {
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| 175 | }
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| 176 |
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| 177 | void calibrate_delay_loop(void)
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| 178 | {
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[aecf79f] | 179 | // i8254_calibrate_delay_loop();
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[0356274] | 180 | if (config.cpu_active == 1) {
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| 181 | /*
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| 182 | * This has to be done only on UP.
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| 183 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
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| 184 | */
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[aecf79f] | 185 | // i8254_normal_operation();
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[0356274] | 186 | }
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| 187 | }
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| 188 |
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| 189 | /** Set thread-local-storage pointer
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| 190 | *
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| 191 | * TLS pointer is set in GS register. That means, the GS contains
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| 192 | * selector, and the descriptor->base is the correct address.
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| 193 | */
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| 194 | unative_t sys_tls_set(unative_t addr)
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| 195 | {
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| 196 | THREAD->arch.tls = addr;
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| 197 | set_tls_desc(addr);
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| 198 |
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| 199 | return 0;
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| 200 | }
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| 201 |
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| 202 | /** Acquire console back for kernel
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| 203 | *
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| 204 | */
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| 205 | void arch_grab_console(void)
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| 206 | {
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| 207 | }
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[aecf79f] | 208 |
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[0356274] | 209 | /** Return console to userspace
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| 210 | *
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| 211 | */
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| 212 | void arch_release_console(void)
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| 213 | {
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| 214 | }
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| 215 |
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| 216 | /** @}
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| 217 | */
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