source: mainline/kernel/arch/ia32/src/smp/smp.c@ 7d07bf3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7d07bf3 was c27c988, checked in by Martin Decky <martin@…>, 19 years ago

fix signed/unsigned comparison

  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#include <smp/smp.h>
36#include <arch/smp/smp.h>
37#include <arch/smp/mps.h>
38#include <arch/smp/ap.h>
39#include <arch/boot/boot.h>
40#include <genarch/acpi/acpi.h>
41#include <genarch/acpi/madt.h>
42#include <config.h>
43#include <synch/waitq.h>
44#include <synch/synch.h>
45#include <arch/pm.h>
46#include <func.h>
47#include <panic.h>
48#include <debug.h>
49#include <arch/asm.h>
50#include <mm/frame.h>
51#include <mm/page.h>
52#include <mm/slab.h>
53#include <mm/as.h>
54#include <print.h>
55#include <memstr.h>
56#include <arch/drivers/i8259.h>
57
58#ifdef CONFIG_SMP
59
60static struct smp_config_operations *ops = NULL;
61
62void smp_init(void)
63{
64 uintptr_t l_apic_address, io_apic_address;
65
66 if (acpi_madt) {
67 acpi_madt_parse();
68 ops = &madt_config_operations;
69 }
70 if (config.cpu_count == 1) {
71 mps_init();
72 ops = &mps_config_operations;
73 }
74
75 l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
76 if (!l_apic_address)
77 panic("cannot allocate address for l_apic\n");
78
79 io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
80 if (!io_apic_address)
81 panic("cannot allocate address for io_apic\n");
82
83 if (config.cpu_count > 1) {
84 page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic,
85 PAGE_NOT_CACHEABLE);
86 page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic,
87 PAGE_NOT_CACHEABLE);
88
89 l_apic = (uint32_t *) l_apic_address;
90 io_apic = (uint32_t *) io_apic_address;
91 }
92}
93
94/*
95 * Kernel thread for bringing up application processors. It becomes clear
96 * that we need an arrangement like this (AP's being initialized by a kernel
97 * thread), for a thread has its dedicated stack. (The stack used during the
98 * BSP initialization (prior the very first call to scheduler()) will be used
99 * as an initialization stack for each AP.)
100 */
101void kmp(void *arg)
102{
103 unsigned int i;
104
105 ASSERT(ops != NULL);
106
107 /*
108 * We need to access data in frame 0.
109 * We boldly make use of kernel address space mapping.
110 */
111
112 /*
113 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
114 */
115 *((uint16_t *) (PA2KA(0x467+0))) = ((uintptr_t) ap_boot) >> 4; /* segment */
116 *((uint16_t *) (PA2KA(0x467+2))) = 0; /* offset */
117
118 /*
119 * Save 0xa to address 0xf of the CMOS RAM.
120 * BIOS will not do the POST after the INIT signal.
121 */
122 outb(0x70,0xf);
123 outb(0x71,0xa);
124
125 pic_disable_irqs(0xffff);
126 apic_init();
127
128 for (i = 0; i < ops->cpu_count(); i++) {
129 struct descriptor *gdt_new;
130
131 /*
132 * Skip processors marked unusable.
133 */
134 if (!ops->cpu_enabled(i))
135 continue;
136
137 /*
138 * The bootstrap processor is already up.
139 */
140 if (ops->cpu_bootstrap(i))
141 continue;
142
143 if (ops->cpu_apic_id(i) == l_apic_id()) {
144 printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
145 continue;
146 }
147
148 /*
149 * Prepare new GDT for CPU in question.
150 */
151 if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
152 panic("couldn't allocate memory for GDT\n");
153
154 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
155 memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
156 protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
157 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
158 gdtr.base = (uintptr_t) gdt_new;
159
160 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
161 /*
162 * There may be just one AP being initialized at
163 * the time. After it comes completely up, it is
164 * supposed to wake us up.
165 */
166 if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
167 printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
168 } else
169 printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
170 }
171}
172
173int smp_irq_to_pin(int irq)
174{
175 ASSERT(ops != NULL);
176 return ops->irq_to_pin(irq);
177}
178
179#endif /* CONFIG_SMP */
180
181/** @}
182 */
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