source: mainline/kernel/arch/ia32/src/smp/smp.c@ 724d643

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 724d643 was fe32163, checked in by Martin Decky <martin@…>, 15 years ago

improve support for inactive CPUs
major revision of MADT and MPS parsing code
limit the number of active CPUs on ia32 and amd64 to 8 (actually the APIC ID of all active CPUs must be in the range 0 .. 7 to avoid tripping on an assertion in APIC code)
fix off-by-one bug in MADT parsing code (missing the last entry)

  • Property mode set to 100644
File size: 5.7 KB
Line 
1/*
2 * Copyright (c) 2008 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#include <smp/smp.h>
36#include <arch/smp/smp.h>
37#include <arch/smp/mps.h>
38#include <arch/smp/ap.h>
39#include <arch/boot/boot.h>
40#include <genarch/acpi/acpi.h>
41#include <genarch/acpi/madt.h>
42#include <config.h>
43#include <synch/waitq.h>
44#include <synch/synch.h>
45#include <arch/pm.h>
46#include <func.h>
47#include <panic.h>
48#include <debug.h>
49#include <arch/asm.h>
50#include <mm/frame.h>
51#include <mm/page.h>
52#include <mm/slab.h>
53#include <mm/as.h>
54#include <print.h>
55#include <memstr.h>
56#include <arch/drivers/i8259.h>
57
58#ifdef CONFIG_SMP
59
60static struct smp_config_operations *ops = NULL;
61
62void smp_init(void)
63{
64 uintptr_t l_apic_address;
65 uintptr_t io_apic_address;
66
67 if (acpi_madt) {
68 acpi_madt_parse();
69 ops = &madt_config_operations;
70 }
71
72 if (config.cpu_count == 1) {
73 mps_init();
74 ops = &mps_config_operations;
75 }
76
77 l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
78 FRAME_ATOMIC | FRAME_KA);
79 if (!l_apic_address)
80 panic("Cannot allocate address for l_apic.");
81
82 io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
83 FRAME_ATOMIC | FRAME_KA);
84 if (!io_apic_address)
85 panic("Cannot allocate address for io_apic.");
86
87 if (config.cpu_count > 1) {
88 page_table_lock(AS_KERNEL, true);
89 page_mapping_insert(AS_KERNEL, l_apic_address,
90 (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE);
91 page_mapping_insert(AS_KERNEL, io_apic_address,
92 (uintptr_t) io_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE);
93 page_table_unlock(AS_KERNEL, true);
94
95 l_apic = (uint32_t *) l_apic_address;
96 io_apic = (uint32_t *) io_apic_address;
97 }
98}
99
100/*
101 * Kernel thread for bringing up application processors. It becomes clear
102 * that we need an arrangement like this (AP's being initialized by a kernel
103 * thread), for a thread has its dedicated stack. (The stack used during the
104 * BSP initialization (prior the very first call to scheduler()) will be used
105 * as an initialization stack for each AP.)
106 */
107void kmp(void *arg __attribute__((unused)))
108{
109 unsigned int i;
110
111 ASSERT(ops != NULL);
112
113 /*
114 * We need to access data in frame 0.
115 * We boldly make use of kernel address space mapping.
116 */
117
118 /*
119 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
120 */
121 *((uint16_t *) (PA2KA(0x467 + 0))) =
122 (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */
123 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */
124
125 /*
126 * Save 0xa to address 0xf of the CMOS RAM.
127 * BIOS will not do the POST after the INIT signal.
128 */
129 pio_write_8((ioport8_t *) 0x70, 0xf);
130 pio_write_8((ioport8_t *) 0x71, 0xa);
131
132 pic_disable_irqs(0xffff);
133 apic_init();
134
135 uint8_t apic = l_apic_id();
136
137 for (i = 0; i < config.cpu_count; i++) {
138 /*
139 * Skip processors marked unusable.
140 */
141 if (!ops->cpu_enabled(i))
142 continue;
143
144 /*
145 * The bootstrap processor is already up.
146 */
147 if (ops->cpu_bootstrap(i))
148 continue;
149
150 if (ops->cpu_apic_id(i) == apic) {
151 printf("%s: bad processor entry #%u, will not send IPI "
152 "to myself\n", __FUNCTION__, i);
153 continue;
154 }
155
156 /*
157 * Prepare new GDT for CPU in question.
158 */
159
160 /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
161 * it needs to be replaced by a generic fuctionality of
162 * the memory subsystem
163 */
164 descriptor_t *gdt_new =
165 (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t),
166 FRAME_ATOMIC);
167 if (!gdt_new)
168 panic("Cannot allocate memory for GDT.");
169
170 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
171 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
172 protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
173 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
174 gdtr.base = (uintptr_t) gdt_new;
175
176 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
177 /*
178 * There may be just one AP being initialized at
179 * the time. After it comes completely up, it is
180 * supposed to wake us up.
181 */
182 if (waitq_sleep_timeout(&ap_completion_wq, 1000000,
183 SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
184 printf("%s: waiting for cpu%u (APIC ID = %d) "
185 "timed out\n", __FUNCTION__, i,
186 ops->cpu_apic_id(i));
187 }
188 } else
189 printf("INIT IPI for l_apic%d failed\n",
190 ops->cpu_apic_id(i));
191 }
192}
193
194int smp_irq_to_pin(unsigned int irq)
195{
196 ASSERT(ops != NULL);
197 return ops->irq_to_pin(irq);
198}
199
200#endif /* CONFIG_SMP */
201
202/** @}
203 */
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