source: mainline/kernel/arch/ia32/src/smp/smp.c@ 0c3e63f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0c3e63f was 0c3e63f, checked in by Martin Decky <martin@…>, 15 years ago

map Local APIC and I/O APIC using hw_map()

  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 * Copyright (c) 2008 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#include <smp/smp.h>
36#include <arch/smp/smp.h>
37#include <arch/smp/mps.h>
38#include <arch/smp/ap.h>
39#include <arch/boot/boot.h>
40#include <genarch/acpi/acpi.h>
41#include <genarch/acpi/madt.h>
42#include <config.h>
43#include <synch/waitq.h>
44#include <synch/synch.h>
45#include <arch/pm.h>
46#include <func.h>
47#include <panic.h>
48#include <debug.h>
49#include <arch/asm.h>
50#include <mm/frame.h>
51#include <mm/page.h>
52#include <mm/slab.h>
53#include <mm/as.h>
54#include <print.h>
55#include <memstr.h>
56#include <arch/drivers/i8259.h>
57
58#ifdef CONFIG_SMP
59
60static struct smp_config_operations *ops = NULL;
61
62void smp_init(void)
63{
64 if (acpi_madt) {
65 acpi_madt_parse();
66 ops = &madt_config_operations;
67 }
68
69 if (config.cpu_count == 1) {
70 mps_init();
71 ops = &mps_config_operations;
72 }
73
74 if (config.cpu_count > 1) {
75 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE);
76 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE);
77 }
78}
79
80/*
81 * Kernel thread for bringing up application processors. It becomes clear
82 * that we need an arrangement like this (AP's being initialized by a kernel
83 * thread), for a thread has its dedicated stack. (The stack used during the
84 * BSP initialization (prior the very first call to scheduler()) will be used
85 * as an initialization stack for each AP.)
86 */
87void kmp(void *arg __attribute__((unused)))
88{
89 unsigned int i;
90
91 ASSERT(ops != NULL);
92
93 /*
94 * We need to access data in frame 0.
95 * We boldly make use of kernel address space mapping.
96 */
97
98 /*
99 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
100 */
101 *((uint16_t *) (PA2KA(0x467 + 0))) =
102 (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */
103 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */
104
105 /*
106 * Save 0xa to address 0xf of the CMOS RAM.
107 * BIOS will not do the POST after the INIT signal.
108 */
109 pio_write_8((ioport8_t *) 0x70, 0xf);
110 pio_write_8((ioport8_t *) 0x71, 0xa);
111
112 pic_disable_irqs(0xffff);
113 apic_init();
114
115 uint8_t apic = l_apic_id();
116
117 for (i = 0; i < config.cpu_count; i++) {
118 /*
119 * Skip processors marked unusable.
120 */
121 if (!ops->cpu_enabled(i))
122 continue;
123
124 /*
125 * The bootstrap processor is already up.
126 */
127 if (ops->cpu_bootstrap(i))
128 continue;
129
130 if (ops->cpu_apic_id(i) == apic) {
131 printf("%s: bad processor entry #%u, will not send IPI "
132 "to myself\n", __FUNCTION__, i);
133 continue;
134 }
135
136 /*
137 * Prepare new GDT for CPU in question.
138 */
139
140 /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
141 * it needs to be replaced by a generic fuctionality of
142 * the memory subsystem
143 */
144 descriptor_t *gdt_new =
145 (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t),
146 FRAME_ATOMIC);
147 if (!gdt_new)
148 panic("Cannot allocate memory for GDT.");
149
150 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
151 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
152 protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
153 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
154 gdtr.base = (uintptr_t) gdt_new;
155
156 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
157 /*
158 * There may be just one AP being initialized at
159 * the time. After it comes completely up, it is
160 * supposed to wake us up.
161 */
162 if (waitq_sleep_timeout(&ap_completion_wq, 1000000,
163 SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
164 printf("%s: waiting for cpu%u (APIC ID = %d) "
165 "timed out\n", __FUNCTION__, i,
166 ops->cpu_apic_id(i));
167 }
168 } else
169 printf("INIT IPI for l_apic%d failed\n",
170 ops->cpu_apic_id(i));
171 }
172}
173
174int smp_irq_to_pin(unsigned int irq)
175{
176 ASSERT(ops != NULL);
177 return ops->irq_to_pin(irq);
178}
179
180#endif /* CONFIG_SMP */
181
182/** @}
183 */
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