[ed0dd65] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[ed0dd65] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup ia32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[ed0dd65] | 35 | #include <smp/smp.h>
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[a26ddd1] | 36 | #include <arch/smp/smp.h>
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| 37 | #include <arch/smp/mps.h>
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| 38 | #include <arch/smp/ap.h>
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[66def8d] | 39 | #include <arch/boot/boot.h>
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[e16e036a] | 40 | #include <genarch/acpi/acpi.h>
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| 41 | #include <genarch/acpi/madt.h>
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[ed0dd65] | 42 | #include <config.h>
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[a26ddd1] | 43 | #include <synch/waitq.h>
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[6153749] | 44 | #include <synch/synch.h>
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[a26ddd1] | 45 | #include <arch/pm.h>
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| 46 | #include <func.h>
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| 47 | #include <panic.h>
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| 48 | #include <debug.h>
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| 49 | #include <arch/asm.h>
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| 50 | #include <mm/frame.h>
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| 51 | #include <mm/page.h>
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[085d973] | 52 | #include <mm/slab.h>
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[fc1e4f6] | 53 | #include <mm/as.h>
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[9c0a9b3] | 54 | #include <print.h>
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| 55 | #include <memstr.h>
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[80d31883] | 56 | #include <arch/drivers/i8259.h>
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[ed0dd65] | 57 |
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[5f85c91] | 58 | #ifdef CONFIG_SMP
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[ed0dd65] | 59 |
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[a26ddd1] | 60 | static struct smp_config_operations *ops = NULL;
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| 61 |
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[ed0dd65] | 62 | void smp_init(void)
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| 63 | {
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[7f1c620] | 64 | uintptr_t l_apic_address, io_apic_address;
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[6a22fcb] | 65 |
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[ed0dd65] | 66 | if (acpi_madt) {
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| 67 | acpi_madt_parse();
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[232e3ec7] | 68 | ops = &madt_config_operations;
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[ed0dd65] | 69 | }
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[a26ddd1] | 70 | if (config.cpu_count == 1) {
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[ed0dd65] | 71 | mps_init();
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[a26ddd1] | 72 | ops = &mps_config_operations;
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| 73 | }
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[7d365305] | 74 |
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[7f1c620] | 75 | l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
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[e45f81a] | 76 | if (!l_apic_address)
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[6a22fcb] | 77 | panic("cannot allocate address for l_apic\n");
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| 78 |
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[7f1c620] | 79 | io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
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[e45f81a] | 80 | if (!io_apic_address)
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[6a22fcb] | 81 | panic("cannot allocate address for io_apic\n");
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| 82 |
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[946b630] | 83 | if (config.cpu_count > 1) {
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[7f1c620] | 84 | page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic,
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[ef67bab] | 85 | PAGE_NOT_CACHEABLE);
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[7f1c620] | 86 | page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic,
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[ef67bab] | 87 | PAGE_NOT_CACHEABLE);
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[6a22fcb] | 88 |
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[7f1c620] | 89 | l_apic = (uint32_t *) l_apic_address;
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| 90 | io_apic = (uint32_t *) io_apic_address;
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[7d365305] | 91 | }
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[ed0dd65] | 92 | }
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| 93 |
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[a26ddd1] | 94 | /*
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| 95 | * Kernel thread for bringing up application processors. It becomes clear
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| 96 | * that we need an arrangement like this (AP's being initialized by a kernel
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| 97 | * thread), for a thread has its dedicated stack. (The stack used during the
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| 98 | * BSP initialization (prior the very first call to scheduler()) will be used
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| 99 | * as an initialization stack for each AP.)
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| 100 | */
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| 101 | void kmp(void *arg)
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| 102 | {
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[c27c988] | 103 | unsigned int i;
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[6401f79] | 104 |
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[a26ddd1] | 105 | ASSERT(ops != NULL);
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| 106 |
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| 107 | /*
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| 108 | * We need to access data in frame 0.
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| 109 | * We boldly make use of kernel address space mapping.
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| 110 | */
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| 111 |
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| 112 | /*
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| 113 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
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| 114 | */
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[7f1c620] | 115 | *((uint16_t *) (PA2KA(0x467+0))) = ((uintptr_t) ap_boot) >> 4; /* segment */
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| 116 | *((uint16_t *) (PA2KA(0x467+2))) = 0; /* offset */
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[a26ddd1] | 117 |
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| 118 | /*
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| 119 | * Save 0xa to address 0xf of the CMOS RAM.
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| 120 | * BIOS will not do the POST after the INIT signal.
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| 121 | */
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| 122 | outb(0x70,0xf);
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| 123 | outb(0x71,0xa);
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| 124 |
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| 125 | pic_disable_irqs(0xffff);
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| 126 | apic_init();
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| 127 |
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| 128 | for (i = 0; i < ops->cpu_count(); i++) {
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| 129 | struct descriptor *gdt_new;
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| 130 |
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| 131 | /*
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| 132 | * Skip processors marked unusable.
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| 133 | */
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| 134 | if (!ops->cpu_enabled(i))
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| 135 | continue;
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| 136 |
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| 137 | /*
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| 138 | * The bootstrap processor is already up.
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| 139 | */
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| 140 | if (ops->cpu_bootstrap(i))
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| 141 | continue;
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| 142 |
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| 143 | if (ops->cpu_apic_id(i) == l_apic_id()) {
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[6153749] | 144 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
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[a26ddd1] | 145 | continue;
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| 146 | }
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| 147 |
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| 148 | /*
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| 149 | * Prepare new GDT for CPU in question.
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| 150 | */
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[bb68433] | 151 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
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[a26ddd1] | 152 | panic("couldn't allocate memory for GDT\n");
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| 153 |
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[66def8d] | 154 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
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[7f1c620] | 155 | memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
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[66def8d] | 156 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
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[7f1c620] | 157 | protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
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| 158 | gdtr.base = (uintptr_t) gdt_new;
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[a26ddd1] | 159 |
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| 160 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
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| 161 | /*
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[c0b45fa] | 162 | * There may be just one AP being initialized at
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[a26ddd1] | 163 | * the time. After it comes completely up, it is
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| 164 | * supposed to wake us up.
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[c0b45fa] | 165 | */
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[116d1ef4] | 166 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
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[6153749] | 167 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
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[c0b45fa] | 168 | } else
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[a26ddd1] | 169 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
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| 170 | }
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| 171 | }
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[ed0dd65] | 172 |
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[a83a802] | 173 | int smp_irq_to_pin(int irq)
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| 174 | {
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| 175 | ASSERT(ops != NULL);
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| 176 | return ops->irq_to_pin(irq);
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| 177 | }
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| 178 |
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[5f85c91] | 179 | #endif /* CONFIG_SMP */
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[b45c443] | 180 |
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[06e1e95] | 181 | /** @}
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[b45c443] | 182 | */
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