[ed0dd65] | 1 | /*
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[4bb31f7] | 2 | * Copyright (c) 2008 Jakub Jermar
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[ed0dd65] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[c5429fe] | 29 | /** @addtogroup kernel_ia32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[ed0dd65] | 35 | #include <smp/smp.h>
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[a26ddd1] | 36 | #include <arch/smp/smp.h>
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| 37 | #include <arch/smp/mps.h>
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| 38 | #include <arch/smp/ap.h>
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[66def8d] | 39 | #include <arch/boot/boot.h>
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[63e27ef] | 40 | #include <assert.h>
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[897fd8f1] | 41 | #include <errno.h>
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[e16e036a] | 42 | #include <genarch/acpi/acpi.h>
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| 43 | #include <genarch/acpi/madt.h>
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[ed0dd65] | 44 | #include <config.h>
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[a26ddd1] | 45 | #include <synch/waitq.h>
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| 46 | #include <arch/pm.h>
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[b2e121a] | 47 | #include <halt.h>
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[a26ddd1] | 48 | #include <panic.h>
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| 49 | #include <arch/asm.h>
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| 50 | #include <mm/page.h>
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[d4673296] | 51 | #include <mm/frame.h>
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| 52 | #include <mm/km.h>
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[aafed15] | 53 | #include <stdlib.h>
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[fc1e4f6] | 54 | #include <mm/as.h>
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[b2fa1204] | 55 | #include <log.h>
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[b169619] | 56 | #include <memw.h>
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[87a5796] | 57 | #include <genarch/drivers/i8259/i8259.h>
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[49e6c6b4] | 58 | #include <cpu.h>
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[ed0dd65] | 59 |
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[5f85c91] | 60 | #ifdef CONFIG_SMP
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[ed0dd65] | 61 |
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[a26ddd1] | 62 | static struct smp_config_operations *ops = NULL;
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| 63 |
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[ed0dd65] | 64 | void smp_init(void)
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| 65 | {
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| 66 | if (acpi_madt) {
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| 67 | acpi_madt_parse();
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[232e3ec7] | 68 | ops = &madt_config_operations;
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[ed0dd65] | 69 | }
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[a35b458] | 70 |
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[a26ddd1] | 71 | if (config.cpu_count == 1) {
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[ed0dd65] | 72 | mps_init();
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[a26ddd1] | 73 | ops = &mps_config_operations;
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| 74 | }
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[a35b458] | 75 |
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[e3ce39b] | 76 | if (config.cpu_count > 1) {
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[adec5b45] | 77 | l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
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[a1b9f63] | 78 | PAGE_SIZE, PAGE_WRITE | PAGE_NOT_CACHEABLE);
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[adec5b45] | 79 | io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE,
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[a1b9f63] | 80 | PAGE_SIZE, PAGE_WRITE | PAGE_NOT_CACHEABLE);
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[7cb567cd] | 81 | }
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[ed0dd65] | 82 | }
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| 83 |
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[49e6c6b4] | 84 | static void cpu_arch_id_init(void)
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| 85 | {
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[63e27ef] | 86 | assert(ops != NULL);
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| 87 | assert(cpus != NULL);
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[a35b458] | 88 |
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[49e6c6b4] | 89 | for (unsigned int i = 0; i < config.cpu_count; ++i) {
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| 90 | cpus[i].arch.id = ops->cpu_apic_id(i);
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| 91 | }
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| 92 | }
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| 93 |
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[a26ddd1] | 94 | /*
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| 95 | * Kernel thread for bringing up application processors. It becomes clear
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| 96 | * that we need an arrangement like this (AP's being initialized by a kernel
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| 97 | * thread), for a thread has its dedicated stack. (The stack used during the
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| 98 | * BSP initialization (prior the very first call to scheduler()) will be used
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| 99 | * as an initialization stack for each AP.)
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| 100 | */
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[7f043c0] | 101 | void kmp(void *arg __attribute__((unused)))
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[a26ddd1] | 102 | {
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[c27c988] | 103 | unsigned int i;
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[a35b458] | 104 |
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[63e27ef] | 105 | assert(ops != NULL);
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[49e6c6b4] | 106 |
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| 107 | /*
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[1b20da0] | 108 | * SMP initialized, cpus array allocated. Assign each CPU its
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[49e6c6b4] | 109 | * physical APIC ID.
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| 110 | */
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| 111 | cpu_arch_id_init();
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[a35b458] | 112 |
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[a26ddd1] | 113 | /*
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| 114 | * We need to access data in frame 0.
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| 115 | * We boldly make use of kernel address space mapping.
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| 116 | */
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[a35b458] | 117 |
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[a26ddd1] | 118 | /*
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| 119 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
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| 120 | */
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[4bb31f7] | 121 | *((uint16_t *) (PA2KA(0x467 + 0))) =
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[fe32163] | 122 | (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */
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| 123 | *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */
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[a35b458] | 124 |
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[a26ddd1] | 125 | /*
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| 126 | * Save 0xa to address 0xf of the CMOS RAM.
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| 127 | * BIOS will not do the POST after the INIT signal.
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| 128 | */
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[fe32163] | 129 | pio_write_8((ioport8_t *) 0x70, 0xf);
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| 130 | pio_write_8((ioport8_t *) 0x71, 0xa);
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[a35b458] | 131 |
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[2a103b5] | 132 | i8259_disable_irqs(0xffff);
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[a26ddd1] | 133 | apic_init();
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[a35b458] | 134 |
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[fe32163] | 135 | for (i = 0; i < config.cpu_count; i++) {
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[a26ddd1] | 136 | /*
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| 137 | * Skip processors marked unusable.
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| 138 | */
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| 139 | if (!ops->cpu_enabled(i))
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| 140 | continue;
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[a35b458] | 141 |
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[a26ddd1] | 142 | /*
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| 143 | * The bootstrap processor is already up.
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| 144 | */
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| 145 | if (ops->cpu_bootstrap(i))
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| 146 | continue;
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[a35b458] | 147 |
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[99718a2e] | 148 | if (ops->cpu_apic_id(i) == bsp_l_apic) {
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[b2fa1204] | 149 | log(LF_ARCH, LVL_ERROR, "kmp: bad processor entry #%u, "
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| 150 | "will not send IPI to myself", i);
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[a26ddd1] | 151 | continue;
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| 152 | }
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[a35b458] | 153 |
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[a26ddd1] | 154 | /*
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| 155 | * Prepare new GDT for CPU in question.
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| 156 | */
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[a35b458] | 157 |
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[7c3fb9b] | 158 | /*
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| 159 | * XXX Flag FRAME_LOW_4_GiB was removed temporarily,
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[5f0f29ce] | 160 | * it needs to be replaced by a generic fuctionality of
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| 161 | * the memory subsystem
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| 162 | */
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[fe32163] | 163 | descriptor_t *gdt_new =
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[11b285d] | 164 | (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t));
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[4bb31f7] | 165 | if (!gdt_new)
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[f651e80] | 166 | panic("Cannot allocate memory for GDT.");
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[a35b458] | 167 |
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[99d6fd0] | 168 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
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| 169 | memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
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| 170 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
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[7f1c620] | 171 | protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
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| 172 | gdtr.base = (uintptr_t) gdt_new;
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[a35b458] | 173 |
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[a26ddd1] | 174 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
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| 175 | /*
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[c0b45fa] | 176 | * There may be just one AP being initialized at
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[a26ddd1] | 177 | * the time. After it comes completely up, it is
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| 178 | * supposed to wake us up.
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[c0b45fa] | 179 | */
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[7c5320c] | 180 | if (semaphore_down_timeout(&ap_completion_semaphore, 1000000) != EOK) {
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[b2fa1204] | 181 | log(LF_ARCH, LVL_NOTE, "%s: waiting for cpu%u "
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| 182 | "(APIC ID = %d) timed out", __FUNCTION__,
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| 183 | i, ops->cpu_apic_id(i));
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[7f043c0] | 184 | }
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[c0b45fa] | 185 | } else
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[b2fa1204] | 186 | log(LF_ARCH, LVL_ERROR, "INIT IPI for l_apic%d failed",
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[4bb31f7] | 187 | ops->cpu_apic_id(i));
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[a26ddd1] | 188 | }
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| 189 | }
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[ed0dd65] | 190 |
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[623b49f1] | 191 | int smp_irq_to_pin(unsigned int irq)
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[a83a802] | 192 | {
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[63e27ef] | 193 | assert(ops != NULL);
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[a83a802] | 194 | return ops->irq_to_pin(irq);
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| 195 | }
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| 196 |
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[5f85c91] | 197 | #endif /* CONFIG_SMP */
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[b45c443] | 198 |
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[06e1e95] | 199 | /** @}
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[b45c443] | 200 | */
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