source: mainline/kernel/arch/ia32/src/proc/scheduler.c@ 3061bc1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3061bc1 was d6f9fff, checked in by Jakub Jermar <jakub@…>, 10 years ago

ia32: Make TLS settable from uspace

The TLS document[1] mandates that %gs[0] is the thread pointer on ia32.
That is good as it allows userspace-only TLS management for fibrils:
fibril_save/restore() simply manipulate the thread pointer in %gs:0 and
don't need to ask the kernel to modify %gs's base. The kernel treats
%gs:0 as another preserved register and preserves it across context
switches. GCC gets in the way a little bit because it by default assumes
that TLS is accessible from negative %gs offsets (which would
necessitate a kernel-assisted solution). Fortunately, there is a GCC
option to suppress this assumption.

  • Introduce the concept of virtual registers, with VREG_TP (thread pointer) being the first of them
  • Preserve VREG_TP in context_save/restore()
  • Stop using sys_tls_set() in favour of using %gs:0 as the thread pointer
  • Make GCC generate code that always goes through %gs:0 to access TLS

[1] Drepper, U.: ELF Handling For Thread-Local Storage

  • Property mode set to 100644
File size: 2.4 KB
RevLine 
[cb4b61d]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[cb4b61d]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[32fffef0]29/** @addtogroup ia32proc
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[cb4b61d]35#include <proc/scheduler.h>
36#include <cpu.h>
[39cea6a]37#include <proc/task.h>
[cb4b61d]38#include <proc/thread.h>
39#include <arch.h>
[c8cd9a8]40#include <arch/interrupt.h>
[281b607]41#include <arch/pm.h>
[39cea6a]42#include <arch/asm.h>
[2382d09]43#include <arch/ddi/ddi.h>
[cb4b61d]44
[9c1ecf9]45/** Perform ia32 specific tasks needed before the new task is run.
[39cea6a]46 *
[9c1ecf9]47 * Interrupts are disabled.
[39cea6a]48 */
[9c1ecf9]49void before_task_runs_arch(void)
[cb4b61d]50{
[2382d09]51 io_perm_bitmap_install();
[9c1ecf9]52}
53
54/** Perform ia32 specific tasks needed before the new thread is scheduled.
55 *
56 * THREAD is locked and interrupts are disabled.
57 */
58void before_thread_runs_arch(void)
59{
[26aafe8]60 uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE];
[99d6fd0]61
[8c15255]62#ifndef PROCESSOR_i486
[4a537dd]63 if (CPU->arch.fi.bits.sep) {
64 /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
[c8cd9a8]65 write_msr(IA32_MSR_SYSENTER_ESP, kstk - sizeof(istate_t));
[4a537dd]66 }
[8c15255]67#endif
[99d6fd0]68
[f2ef7fd]69 /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
70 CPU->arch.tss->esp0 = kstk;
[1d3d2cf]71 CPU->arch.tss->ss0 = GDT_SELECTOR(KDATA_DES);
[cb4b61d]72}
[97f1691]73
74void after_thread_ran_arch(void)
75{
76}
[b45c443]77
[32fffef0]78/** @}
[b45c443]79 */
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