source: mainline/kernel/arch/ia32/src/mm/frame.c@ 0c39b96

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0c39b96 was 142084b2, checked in by Martin Decky <martin@…>, 15 years ago

safer way how to register memory zones, do not ignore zones with unknown flag, but register them simply as reserved
register ACPI NVS zones as firmware zones

  • Property mode set to 100644
File size: 5.6 KB
RevLine 
[f761f1eb]1/*
[4bb31f7]2 * Copyright (c) 2008 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[a000878c]29/** @addtogroup ia32mm
[b45c443]30 * @{
31 */
32/** @file
33 * @ingroup ia32mm, amd64mm
34 */
35
[f761f1eb]36#include <mm/frame.h>
37#include <arch/mm/frame.h>
[20d50a1]38#include <mm/as.h>
[f761f1eb]39#include <config.h>
[f6297e0]40#include <arch/boot/boot.h>
[5d721f0]41#include <arch/boot/memmap.h>
[84dd253]42#include <panic.h>
[328f2934]43#include <debug.h>
[95498e5]44#include <align.h>
[085d973]45#include <macros.h>
46
47#include <print.h>
48
[64f6ef04]49#define PHYSMEM_LIMIT32 0x07c000000ull
50#define PHYSMEM_LIMIT64 0x200000000ull
[cae5404]51
[f6297e0]52size_t hardcoded_unmapped_ktext_size = 0;
53size_t hardcoded_unmapped_kdata_size = 0;
[f761f1eb]54
[7f1c620]55uintptr_t last_frame = 0;
[95498e5]56
[085d973]57static void init_e820_memory(pfn_t minconf)
58{
[b07c332]59 unsigned int i;
[cae5404]60
[085d973]61 for (i = 0; i < e820counter; i++) {
[e49e234]62 uint64_t base = e820table[i].base_address;
63 uint64_t size = e820table[i].size;
64
65#ifdef __32_BITS__
[cae5404]66 /*
67 * XXX FIXME:
68 *
[68667ce]69 * Ignore zones which start above PHYSMEM_LIMIT32
70 * or clip zones which go beyond PHYSMEM_LIMIT32.
[cae5404]71 *
[68667ce]72 * The PHYSMEM_LIMIT32 (2 GB - 64 MB) is a rather
[cae5404]73 * arbitrary constant which allows to have at
74 * least 64 MB in the kernel address space to
75 * map hardware resources.
76 *
77 * The kernel uses fixed 1:1 identity mapping
78 * of the physical memory with 2:2 GB split.
79 * This is a severe limitation of the current
80 * kernel memory management.
81 *
82 */
83
[68667ce]84 if (base > PHYSMEM_LIMIT32)
[e49e234]85 continue;
86
[68667ce]87 if (base + size > PHYSMEM_LIMIT32)
88 size = PHYSMEM_LIMIT32 - base;
89#endif
90
91#ifdef __64_BITS__
92 /*
93 * XXX FIXME:
94 *
95 * Ignore zones which start above PHYSMEM_LIMIT64
96 * or clip zones which go beyond PHYSMEM_LIMIT64.
97 *
[64f6ef04]98 * The PHYSMEM_LIMIT64 (8 GB) is the size of the
99 * fixed 1:1 identically mapped physical memory
100 * accessible during the bootstrap process.
101 * This is a severe limitation of the current
102 * kernel memory management.
[68667ce]103 *
104 */
105
106 if (base > PHYSMEM_LIMIT64)
107 continue;
108
109 if (base + size > PHYSMEM_LIMIT64)
110 size = PHYSMEM_LIMIT64 - base;
[e49e234]111#endif
[cae5404]112
[085d973]113 if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {
[720db0c]114 /* To be safe, make the available zone possibly smaller */
115 uint64_t new_base = ALIGN_UP(base, FRAME_SIZE);
116 uint64_t new_size = ALIGN_DOWN(size - (new_base - base),
117 FRAME_SIZE);
118
119 pfn_t pfn = ADDR2PFN(new_base);
120 size_t count = SIZE2FRAMES(new_size);
[b07c332]121
[e49e234]122 pfn_t conf;
123 if ((minconf < pfn) || (minconf >= pfn + count))
124 conf = pfn;
[085d973]125 else
126 conf = minconf;
[b07c332]127
[e49e234]128 zone_create(pfn, count, conf, ZONE_AVAILABLE);
[b07c332]129
[e49e234]130 // XXX this has to be removed
[720db0c]131 if (last_frame < ALIGN_UP(new_base + new_size, FRAME_SIZE))
132 last_frame = ALIGN_UP(new_base + new_size, FRAME_SIZE);
[142084b2]133 } else if ((e820table[i].type == MEMMAP_MEMORY_ACPI) ||
134 (e820table[i].type == MEMMAP_MEMORY_NVS)) {
135 /* To be safe, make the firmware zone possibly larger */
[720db0c]136 uint64_t new_base = ALIGN_DOWN(base, FRAME_SIZE);
137 uint64_t new_size = ALIGN_UP(size + (base - new_base),
138 FRAME_SIZE);
[e49e234]139
[720db0c]140 zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
[142084b2]141 ZONE_FIRMWARE);
142 } else {
143 /* To be safe, make the reserved zone possibly larger */
[720db0c]144 uint64_t new_base = ALIGN_DOWN(base, FRAME_SIZE);
145 uint64_t new_size = ALIGN_UP(size + (base - new_base),
146 FRAME_SIZE);
[e49e234]147
[720db0c]148 zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
[142084b2]149 ZONE_RESERVED);
[ae318d3]150 }
[085d973]151 }
152}
153
[a000878c]154static const char *e820names[] = {
[a7df23c]155 "invalid",
156 "available",
157 "reserved",
158 "acpi",
159 "nvs",
160 "unusable"
161};
[085d973]162
[b07c332]163void physmem_print(void)
[085d973]164{
[43b1e86]165 unsigned int i;
[33dac7d]166 printf("[base ] [size ] [name ]\n");
[43b1e86]167
[085d973]168 for (i = 0; i < e820counter; i++) {
[33dac7d]169 const char *name;
170
[085d973]171 if (e820table[i].type <= MEMMAP_MEMORY_UNUSABLE)
172 name = e820names[e820table[i].type];
173 else
174 name = "invalid";
[43b1e86]175
[33dac7d]176 printf("%#018" PRIx64 " %#018" PRIx64" %s\n", e820table[i].base_address,
[ba4a63b8]177 e820table[i].size, name);
[0b5f9fa]178 }
[085d973]179}
180
181
[f761f1eb]182void frame_arch_init(void)
183{
[b07c332]184 pfn_t minconf;
[4cc2ddd]185
[f761f1eb]186 if (config.cpu_active == 1) {
[085d973]187 minconf = 1;
[ae318d3]188
[085d973]189#ifdef CONFIG_SMP
190 minconf = max(minconf,
[ba4a63b8]191 ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size +
192 hardcoded_unmapped_kdata_size));
[085d973]193#endif
[33dac7d]194
[085d973]195 init_e820_memory(minconf);
[ae318d3]196
[328f2934]197 /* Reserve frame 0 (BIOS data) */
[085d973]198 frame_mark_unavailable(0, 1);
[328f2934]199
[66def8d]200#ifdef CONFIG_SMP
201 /* Reserve AP real mode bootstrap memory */
[142084b2]202 frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH,
[ba4a63b8]203 (hardcoded_unmapped_ktext_size +
204 hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);
[66def8d]205#endif
[f761f1eb]206 }
207}
[b45c443]208
[06e1e95]209/** @}
[b45c443]210 */
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