[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2001-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[b6529ae] | 29 | /** @addtogroup ia32interrupt
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[f761f1eb] | 35 | #include <arch/interrupt.h>
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[204674e] | 36 | #include <syscall/syscall.h>
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[f761f1eb] | 37 | #include <print.h>
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[02a99d2] | 38 | #include <debug.h>
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[f761f1eb] | 39 | #include <panic.h>
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[80d31883] | 40 | #include <arch/drivers/i8259.h>
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[f761f1eb] | 41 | #include <func.h>
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| 42 | #include <cpu.h>
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| 43 | #include <arch/asm.h>
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[169587a] | 44 | #include <mm/tlb.h>
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[20d50a1] | 45 | #include <mm/as.h>
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[cb4b61d] | 46 | #include <arch.h>
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[1084a784] | 47 | #include <proc/thread.h>
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[2382d09] | 48 | #include <proc/task.h>
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| 49 | #include <synch/spinlock.h>
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| 50 | #include <arch/ddi/ddi.h>
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[5626277] | 51 | #include <ipc/sysipc.h>
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| 52 | #include <interrupt.h>
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[cea12e9] | 53 | #include <ddi/irq.h>
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[e2b762ec] | 54 | #include <symtab.h>
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[203deeb8] | 55 | #include <stacktrace.h>
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[e2b762ec] | 56 |
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[f761f1eb] | 57 | /*
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| 58 | * Interrupt and exception dispatching.
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| 59 | */
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| 60 |
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[7f1c620] | 61 | void (* disable_irqs_function)(uint16_t irqmask) = NULL;
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| 62 | void (* enable_irqs_function)(uint16_t irqmask) = NULL;
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[f761f1eb] | 63 | void (* eoi_function)(void) = NULL;
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[acc7ce4] | 64 | const char *irqs_info = NULL;
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[f761f1eb] | 65 |
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[22a28a69] | 66 | void istate_decode(istate_t *istate)
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[97b64c9] | 67 | {
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[7e752b2] | 68 | printf("cs =%#0" PRIx32 "\teip=%p\t"
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| 69 | "efl=%#0" PRIx32 "\terr=%#0" PRIx32 "\n",
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| 70 | istate->cs, (void *) istate->eip,
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| 71 | istate->eflags, istate->error_word);
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| 72 |
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| 73 | printf("ds =%#0" PRIx32 "\tes =%#0" PRIx32 "\t"
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| 74 | "fs =%#0" PRIx32 "\tgs =%#0" PRIx32 "\n",
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[0d1e976] | 75 | istate->ds, istate->es, istate->fs, istate->gs);
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[7e752b2] | 76 |
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[c9eb31c2] | 77 | if (istate_from_uspace(istate))
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[7e752b2] | 78 | printf("ss =%#0" PRIx32 "\n", istate->ss);
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| 79 |
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| 80 | printf("eax=%#0" PRIx32 "\tebx=%#0" PRIx32 "\t"
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| 81 | "ecx=%#0" PRIx32 "\tedx=%#0" PRIx32 "\n",
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[0d1e976] | 82 | istate->eax, istate->ebx, istate->ecx, istate->edx);
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[7e752b2] | 83 |
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[0d1e976] | 84 | printf("esi=%p\tedi=%p\tebp=%p\tesp=%p\n",
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[7e752b2] | 85 | (void *) istate->esi, (void *) istate->edi,
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| 86 | (void *) istate->ebp,
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| 87 | istate_from_uspace(istate) ? ((void *) istate->esp) :
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| 88 | &istate->esp);
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[97b64c9] | 89 | }
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[ab08b42] | 90 |
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[cea12e9] | 91 | static void trap_virtual_eoi(void)
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| 92 | {
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| 93 | if (eoi_function)
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| 94 | eoi_function();
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| 95 | else
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[f651e80] | 96 | panic("No eoi_function.");
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[cea12e9] | 97 |
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| 98 | }
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| 99 |
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[214ec25c] | 100 | static void null_interrupt(unsigned int n, istate_t *istate)
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[f761f1eb] | 101 | {
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[214ec25c] | 102 | fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
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[62baed17] | 103 | panic_badtrap(istate, n, "Unserviced interrupt: %u.", n);
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[f761f1eb] | 104 | }
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| 105 |
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[214ec25c] | 106 | static void de_fault(unsigned int n, istate_t *istate)
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[4491338] | 107 | {
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| 108 | fault_if_from_uspace(istate, "Divide error.");
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[62baed17] | 109 | panic_badtrap(istate, n, "Divide error.");
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[4491338] | 110 | }
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| 111 |
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[2382d09] | 112 | /** General Protection Fault. */
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[214ec25c] | 113 | static void gp_fault(unsigned int n __attribute__((unused)), istate_t *istate)
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[f761f1eb] | 114 | {
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[2382d09] | 115 | if (TASK) {
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[da1bafb] | 116 | irq_spinlock_lock(&TASK->lock, false);
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| 117 | size_t ver = TASK->arch.iomapver;
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| 118 | irq_spinlock_unlock(&TASK->lock, false);
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[2382d09] | 119 |
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| 120 | if (CPU->arch.iomapver_copy != ver) {
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| 121 | /*
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| 122 | * This fault can be caused by an early access
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| 123 | * to I/O port because of an out-dated
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| 124 | * I/O Permission bitmap installed on CPU.
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| 125 | * Install the fresh copy and restart
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| 126 | * the instruction.
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| 127 | */
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| 128 | io_perm_bitmap_install();
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| 129 | return;
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| 130 | }
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[f651e80] | 131 | fault_if_from_uspace(istate, "General protection fault.");
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[2382d09] | 132 | }
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[62baed17] | 133 | panic_badtrap(istate, n, "General protection fault.");
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[f761f1eb] | 134 | }
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| 135 |
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[214ec25c] | 136 | static void ss_fault(unsigned int n __attribute__((unused)), istate_t *istate)
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[6de2480e] | 137 | {
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[f651e80] | 138 | fault_if_from_uspace(istate, "Stack fault.");
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[62baed17] | 139 | panic_badtrap(istate, n, "Stack fault.");
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[6de2480e] | 140 | }
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| 141 |
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[214ec25c] | 142 | static void simd_fp_exception(unsigned int n __attribute__((unused)), istate_t *istate)
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[3b05862f] | 143 | {
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[7f1c620] | 144 | uint32_t mxcsr;
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[da1bafb] | 145 | asm volatile (
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[add04f7] | 146 | "stmxcsr %[mxcsr]\n"
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| 147 | : [mxcsr] "=m" (mxcsr)
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[3b05862f] | 148 | );
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[da1bafb] | 149 |
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[7e752b2] | 150 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
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| 151 | mxcsr);
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| 152 | panic_badtrap(istate, n, "SIMD FP exception");
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[3b05862f] | 153 | }
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| 154 |
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[214ec25c] | 155 | static void nm_fault(unsigned int n __attribute__((unused)),
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[da1bafb] | 156 | istate_t *istate __attribute__((unused)))
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[6a27d63] | 157 | {
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[da1bafb] | 158 | #ifdef CONFIG_FPU_LAZY
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[b49f4ae] | 159 | scheduler_fpu_lazy_request();
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| 160 | #else
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[f651e80] | 161 | fault_if_from_uspace(istate, "FPU fault.");
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[62baed17] | 162 | panic_badtrap(istate, n, "FPU fault.");
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[b49f4ae] | 163 | #endif
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[6a27d63] | 164 | }
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| 165 |
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[cea12e9] | 166 | #ifdef CONFIG_SMP
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[214ec25c] | 167 | static void tlb_shootdown_ipi(unsigned int n __attribute__((unused)),
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[da1bafb] | 168 | istate_t *istate __attribute__((unused)))
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[f761f1eb] | 169 | {
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[cea12e9] | 170 | trap_virtual_eoi();
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| 171 | tlb_shootdown_ipi_recv();
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[f761f1eb] | 172 | }
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[cea12e9] | 173 | #endif
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[f761f1eb] | 174 |
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[cea12e9] | 175 | /** Handler of IRQ exceptions */
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[214ec25c] | 176 | static void irq_interrupt(unsigned int n, istate_t *istate __attribute__((unused)))
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[169587a] | 177 | {
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[cea12e9] | 178 | ASSERT(n >= IVT_IRQBASE);
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| 179 |
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[214ec25c] | 180 | unsigned int inum = n - IVT_IRQBASE;
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[7bcfbbc] | 181 | bool ack = false;
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[cea12e9] | 182 | ASSERT(inum < IRQ_COUNT);
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| 183 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
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[7bcfbbc] | 184 |
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[cea12e9] | 185 | irq_t *irq = irq_dispatch_and_lock(inum);
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| 186 | if (irq) {
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| 187 | /*
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| 188 | * The IRQ handler was found.
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| 189 | */
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[da1bafb] | 190 |
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[7bcfbbc] | 191 | if (irq->preack) {
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| 192 | /* Send EOI before processing the interrupt */
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| 193 | trap_virtual_eoi();
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| 194 | ack = true;
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| 195 | }
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[6cd9aa6] | 196 | irq->handler(irq);
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[da1bafb] | 197 | irq_spinlock_unlock(&irq->lock, false);
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[cea12e9] | 198 | } else {
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| 199 | /*
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| 200 | * Spurious interrupt.
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| 201 | */
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| 202 | #ifdef CONFIG_DEBUG
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[214ec25c] | 203 | printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
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[cea12e9] | 204 | #endif
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| 205 | }
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[7bcfbbc] | 206 |
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| 207 | if (!ack)
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| 208 | trap_virtual_eoi();
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[cea12e9] | 209 | }
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| 210 |
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| 211 | void interrupt_init(void)
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| 212 | {
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[b3b7e14a] | 213 | unsigned int i;
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[cea12e9] | 214 |
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| 215 | for (i = 0; i < IVT_ITEMS; i++)
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[b3b7e14a] | 216 | exc_register(i, "null", false, (iroutine_t) null_interrupt);
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[cea12e9] | 217 |
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| 218 | for (i = 0; i < IRQ_COUNT; i++) {
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| 219 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
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[b3b7e14a] | 220 | exc_register(IVT_IRQBASE + i, "irq", true,
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| 221 | (iroutine_t) irq_interrupt);
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[cea12e9] | 222 | }
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| 223 |
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[b3b7e14a] | 224 | exc_register(0, "de_fault", true, (iroutine_t) de_fault);
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| 225 | exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
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| 226 | exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
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| 227 | exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
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| 228 | exc_register(19, "simd_fp", true, (iroutine_t) simd_fp_exception);
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[cea12e9] | 229 |
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| 230 | #ifdef CONFIG_SMP
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[b3b7e14a] | 231 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
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| 232 | (iroutine_t) tlb_shootdown_ipi);
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[cea12e9] | 233 | #endif
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[169587a] | 234 | }
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| 235 |
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[7f1c620] | 236 | void trap_virtual_enable_irqs(uint16_t irqmask)
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[f761f1eb] | 237 | {
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| 238 | if (enable_irqs_function)
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| 239 | enable_irqs_function(irqmask);
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| 240 | else
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[f651e80] | 241 | panic("No enable_irqs_function.");
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[f761f1eb] | 242 | }
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| 243 |
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[7f1c620] | 244 | void trap_virtual_disable_irqs(uint16_t irqmask)
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[f761f1eb] | 245 | {
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| 246 | if (disable_irqs_function)
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| 247 | disable_irqs_function(irqmask);
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| 248 | else
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[f651e80] | 249 | panic("No disable_irqs_function.");
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[f761f1eb] | 250 | }
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| 251 |
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[3222efd] | 252 | /** @}
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[b45c443] | 253 | */
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