source: mainline/kernel/arch/ia32/src/interrupt.c@ da1bafb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da1bafb was da1bafb, checked in by Martin Decky <martin@…>, 15 years ago

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
  • Property mode set to 100644
File size: 6.6 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[b6529ae]29/** @addtogroup ia32interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch/interrupt.h>
[204674e]36#include <syscall/syscall.h>
[f761f1eb]37#include <print.h>
[02a99d2]38#include <debug.h>
[f761f1eb]39#include <panic.h>
[80d31883]40#include <arch/drivers/i8259.h>
[f761f1eb]41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
[169587a]44#include <mm/tlb.h>
[20d50a1]45#include <mm/as.h>
[cb4b61d]46#include <arch.h>
[1084a784]47#include <proc/thread.h>
[2382d09]48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
[5626277]51#include <ipc/sysipc.h>
52#include <interrupt.h>
[cea12e9]53#include <ddi/irq.h>
[e2b762ec]54#include <symtab.h>
[203deeb8]55#include <stacktrace.h>
[e2b762ec]56
[f761f1eb]57/*
58 * Interrupt and exception dispatching.
59 */
60
[7f1c620]61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
[f761f1eb]63void (* eoi_function)(void) = NULL;
64
[cea12e9]65void decode_istate(istate_t *istate)
[97b64c9]66{
[a000878c]67 const char *symbol = symtab_fmt_name_lookup(istate->eip);
68
[97b64c9]69 if (CPU)
[e8a0b90]70 printf("----------------EXCEPTION OCCURED (cpu%u)----------------\n", CPU->id);
[97b64c9]71 else
72 printf("----------------EXCEPTION OCCURED----------------\n");
[a000878c]73
[e8a0b90]74 printf("%%eip: %#lx (%s)\n", istate->eip, symbol);
75 printf("ERROR_WORD=%#lx\n", istate->error_word);
76 printf("%%cs=%#lx,flags=%#lx\n", istate->cs, istate->eflags);
77 printf("%%eax=%#lx, %%ecx=%#lx, %%edx=%#lx, %%esp=%p\n", istate->eax, istate->ecx, istate->edx, &istate->stack[0]);
78 printf("stack: %#lx, %#lx, %#lx, %#lx\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
79 printf(" %#lx, %#lx, %#lx, %#lx\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
[a000878c]80
[203deeb8]81 stack_trace_istate(istate);
[97b64c9]82}
[ab08b42]83
[cea12e9]84static void trap_virtual_eoi(void)
85{
86 if (eoi_function)
87 eoi_function();
88 else
[f651e80]89 panic("No eoi_function.");
[cea12e9]90
91}
92
93static void null_interrupt(int n, istate_t *istate)
[f761f1eb]94{
[f651e80]95 fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n);
[da1bafb]96
[cea12e9]97 decode_istate(istate);
[f651e80]98 panic("Unserviced interrupt: %d.", n);
[f761f1eb]99}
100
[4491338]101static void de_fault(int n, istate_t *istate)
102{
103 fault_if_from_uspace(istate, "Divide error.");
[da1bafb]104
[4491338]105 decode_istate(istate);
106 panic("Divide error.");
107}
108
[2382d09]109/** General Protection Fault. */
[e8a0b90]110static void gp_fault(int n __attribute__((unused)), istate_t *istate)
[f761f1eb]111{
[2382d09]112 if (TASK) {
[da1bafb]113 irq_spinlock_lock(&TASK->lock, false);
114 size_t ver = TASK->arch.iomapver;
115 irq_spinlock_unlock(&TASK->lock, false);
[2382d09]116
117 if (CPU->arch.iomapver_copy != ver) {
118 /*
119 * This fault can be caused by an early access
120 * to I/O port because of an out-dated
121 * I/O Permission bitmap installed on CPU.
122 * Install the fresh copy and restart
123 * the instruction.
124 */
125 io_perm_bitmap_install();
126 return;
127 }
[f651e80]128 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]129 }
[da1bafb]130
[cea12e9]131 decode_istate(istate);
[f651e80]132 panic("General protection fault.");
[f761f1eb]133}
134
[e8a0b90]135static void ss_fault(int n __attribute__((unused)), istate_t *istate)
[6de2480e]136{
[f651e80]137 fault_if_from_uspace(istate, "Stack fault.");
[da1bafb]138
[cea12e9]139 decode_istate(istate);
[f651e80]140 panic("Stack fault.");
[6de2480e]141}
142
[e8a0b90]143static void simd_fp_exception(int n __attribute__((unused)), istate_t *istate)
[3b05862f]144{
[7f1c620]145 uint32_t mxcsr;
[da1bafb]146 asm volatile (
[add04f7]147 "stmxcsr %[mxcsr]\n"
148 : [mxcsr] "=m" (mxcsr)
[3b05862f]149 );
[da1bafb]150
[f651e80]151 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx.",
[e8a0b90]152 (unative_t) mxcsr);
[add04f7]153
[cea12e9]154 decode_istate(istate);
[e8a0b90]155 printf("MXCSR: %#lx\n", mxcsr);
[f651e80]156 panic("SIMD FP exception(19).");
[3b05862f]157}
158
[da1bafb]159static void nm_fault(int n __attribute__((unused)),
160 istate_t *istate __attribute__((unused)))
[6a27d63]161{
[da1bafb]162#ifdef CONFIG_FPU_LAZY
[b49f4ae]163 scheduler_fpu_lazy_request();
164#else
[f651e80]165 fault_if_from_uspace(istate, "FPU fault.");
166 panic("FPU fault.");
[b49f4ae]167#endif
[6a27d63]168}
169
[cea12e9]170#ifdef CONFIG_SMP
[da1bafb]171static void tlb_shootdown_ipi(int n __attribute__((unused)),
172 istate_t *istate __attribute__((unused)))
[f761f1eb]173{
[cea12e9]174 trap_virtual_eoi();
175 tlb_shootdown_ipi_recv();
[f761f1eb]176}
[cea12e9]177#endif
[f761f1eb]178
[cea12e9]179/** Handler of IRQ exceptions */
[e8a0b90]180static void irq_interrupt(int n, istate_t *istate __attribute__((unused)))
[169587a]181{
[cea12e9]182 ASSERT(n >= IVT_IRQBASE);
183
184 int inum = n - IVT_IRQBASE;
[7bcfbbc]185 bool ack = false;
[cea12e9]186 ASSERT(inum < IRQ_COUNT);
187 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[7bcfbbc]188
[cea12e9]189 irq_t *irq = irq_dispatch_and_lock(inum);
190 if (irq) {
191 /*
192 * The IRQ handler was found.
193 */
[da1bafb]194
[7bcfbbc]195 if (irq->preack) {
196 /* Send EOI before processing the interrupt */
197 trap_virtual_eoi();
198 ack = true;
199 }
[6cd9aa6]200 irq->handler(irq);
[da1bafb]201 irq_spinlock_unlock(&irq->lock, false);
[cea12e9]202 } else {
203 /*
204 * Spurious interrupt.
205 */
206#ifdef CONFIG_DEBUG
[e8a0b90]207 printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, inum);
[cea12e9]208#endif
209 }
[7bcfbbc]210
211 if (!ack)
212 trap_virtual_eoi();
[cea12e9]213}
214
215void interrupt_init(void)
216{
217 int i;
218
219 for (i = 0; i < IVT_ITEMS; i++)
220 exc_register(i, "null", (iroutine) null_interrupt);
221
222 for (i = 0; i < IRQ_COUNT; i++) {
223 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
224 exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt);
225 }
226
[4491338]227 exc_register(0, "de_fault", (iroutine) de_fault);
[cea12e9]228 exc_register(7, "nm_fault", (iroutine) nm_fault);
229 exc_register(12, "ss_fault", (iroutine) ss_fault);
230 exc_register(13, "gp_fault", (iroutine) gp_fault);
231 exc_register(19, "simd_fp", (iroutine) simd_fp_exception);
232
233#ifdef CONFIG_SMP
234 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi);
235#endif
[169587a]236}
237
[7f1c620]238void trap_virtual_enable_irqs(uint16_t irqmask)
[f761f1eb]239{
240 if (enable_irqs_function)
241 enable_irqs_function(irqmask);
242 else
[f651e80]243 panic("No enable_irqs_function.");
[f761f1eb]244}
245
[7f1c620]246void trap_virtual_disable_irqs(uint16_t irqmask)
[f761f1eb]247{
248 if (disable_irqs_function)
249 disable_irqs_function(irqmask);
250 else
[f651e80]251 panic("No disable_irqs_function.");
[f761f1eb]252}
253
[3222efd]254/** @}
[b45c443]255 */
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