source: mainline/kernel/arch/ia32/src/interrupt.c@ c9eb31c2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c9eb31c2 was c9eb31c2, checked in by Jakub Jermar <jakub@…>, 15 years ago

Print all potentially interesting information about an ia32 trap frame in
istate_decode(). This includes all the GPRs and some other registers.

  • Property mode set to 100644
File size: 6.6 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[b6529ae]29/** @addtogroup ia32interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch/interrupt.h>
[204674e]36#include <syscall/syscall.h>
[f761f1eb]37#include <print.h>
[02a99d2]38#include <debug.h>
[f761f1eb]39#include <panic.h>
[80d31883]40#include <arch/drivers/i8259.h>
[f761f1eb]41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
[169587a]44#include <mm/tlb.h>
[20d50a1]45#include <mm/as.h>
[cb4b61d]46#include <arch.h>
[1084a784]47#include <proc/thread.h>
[2382d09]48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
[5626277]51#include <ipc/sysipc.h>
52#include <interrupt.h>
[cea12e9]53#include <ddi/irq.h>
[e2b762ec]54#include <symtab.h>
[203deeb8]55#include <stacktrace.h>
[e2b762ec]56
[f761f1eb]57/*
58 * Interrupt and exception dispatching.
59 */
60
[7f1c620]61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
[f761f1eb]63void (* eoi_function)(void) = NULL;
64
[22a28a69]65void istate_decode(istate_t *istate)
[97b64c9]66{
[c9eb31c2]67 printf("error_word=%p\n", istate->error_word);
68 printf("eflags=%p\n", istate->eflags);
69
70 printf("cs =%p\tds =%p\tes =%p\n", istate->cs, istate->ds, istate->es);
71 printf("fs =%p\tgs =%p", istate->fs, istate->gs);
72 if (istate_from_uspace(istate))
73 printf("\tss =%p\n", istate->ss);
74 else
75 printf("\n");
76
77 printf("eax=%p\tebx=%p\tecx=%p\n", istate->eax, istate->ebx,
78 istate->ecx);
79 printf("edx=%p\tedi=%p\tesi=%p\n", istate->edx, istate->edi,
80 istate->esi);
81 printf("ebp=%p\tesp=%p\teip=%p\n", istate->ebp,
82 istate_from_uspace(istate) ? istate->esp : (uintptr_t) &istate->esp,
83 istate->eip);
[97b64c9]84}
[ab08b42]85
[cea12e9]86static void trap_virtual_eoi(void)
87{
88 if (eoi_function)
89 eoi_function();
90 else
[f651e80]91 panic("No eoi_function.");
[cea12e9]92
93}
94
[214ec25c]95static void null_interrupt(unsigned int n, istate_t *istate)
[f761f1eb]96{
[214ec25c]97 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[62baed17]98 panic_badtrap(istate, n, "Unserviced interrupt: %u.", n);
[f761f1eb]99}
100
[214ec25c]101static void de_fault(unsigned int n, istate_t *istate)
[4491338]102{
103 fault_if_from_uspace(istate, "Divide error.");
[62baed17]104 panic_badtrap(istate, n, "Divide error.");
[4491338]105}
106
[2382d09]107/** General Protection Fault. */
[214ec25c]108static void gp_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[f761f1eb]109{
[2382d09]110 if (TASK) {
[da1bafb]111 irq_spinlock_lock(&TASK->lock, false);
112 size_t ver = TASK->arch.iomapver;
113 irq_spinlock_unlock(&TASK->lock, false);
[2382d09]114
115 if (CPU->arch.iomapver_copy != ver) {
116 /*
117 * This fault can be caused by an early access
118 * to I/O port because of an out-dated
119 * I/O Permission bitmap installed on CPU.
120 * Install the fresh copy and restart
121 * the instruction.
122 */
123 io_perm_bitmap_install();
124 return;
125 }
[f651e80]126 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]127 }
[62baed17]128 panic_badtrap(istate, n, "General protection fault.");
[f761f1eb]129}
130
[214ec25c]131static void ss_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[6de2480e]132{
[f651e80]133 fault_if_from_uspace(istate, "Stack fault.");
[62baed17]134 panic_badtrap(istate, n, "Stack fault.");
[6de2480e]135}
136
[214ec25c]137static void simd_fp_exception(unsigned int n __attribute__((unused)), istate_t *istate)
[3b05862f]138{
[7f1c620]139 uint32_t mxcsr;
[da1bafb]140 asm volatile (
[add04f7]141 "stmxcsr %[mxcsr]\n"
142 : [mxcsr] "=m" (mxcsr)
[3b05862f]143 );
[da1bafb]144
[62baed17]145 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0.8x.",
[e8a0b90]146 (unative_t) mxcsr);
[62baed17]147 panic_badtrap(istate, n, "SIMD FP exception, MXCSR=%#0.8x");
[3b05862f]148}
149
[214ec25c]150static void nm_fault(unsigned int n __attribute__((unused)),
[da1bafb]151 istate_t *istate __attribute__((unused)))
[6a27d63]152{
[da1bafb]153#ifdef CONFIG_FPU_LAZY
[b49f4ae]154 scheduler_fpu_lazy_request();
155#else
[f651e80]156 fault_if_from_uspace(istate, "FPU fault.");
[62baed17]157 panic_badtrap(istate, n, "FPU fault.");
[b49f4ae]158#endif
[6a27d63]159}
160
[cea12e9]161#ifdef CONFIG_SMP
[214ec25c]162static void tlb_shootdown_ipi(unsigned int n __attribute__((unused)),
[da1bafb]163 istate_t *istate __attribute__((unused)))
[f761f1eb]164{
[cea12e9]165 trap_virtual_eoi();
166 tlb_shootdown_ipi_recv();
[f761f1eb]167}
[cea12e9]168#endif
[f761f1eb]169
[cea12e9]170/** Handler of IRQ exceptions */
[214ec25c]171static void irq_interrupt(unsigned int n, istate_t *istate __attribute__((unused)))
[169587a]172{
[cea12e9]173 ASSERT(n >= IVT_IRQBASE);
174
[214ec25c]175 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]176 bool ack = false;
[cea12e9]177 ASSERT(inum < IRQ_COUNT);
178 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[7bcfbbc]179
[cea12e9]180 irq_t *irq = irq_dispatch_and_lock(inum);
181 if (irq) {
182 /*
183 * The IRQ handler was found.
184 */
[da1bafb]185
[7bcfbbc]186 if (irq->preack) {
187 /* Send EOI before processing the interrupt */
188 trap_virtual_eoi();
189 ack = true;
190 }
[6cd9aa6]191 irq->handler(irq);
[da1bafb]192 irq_spinlock_unlock(&irq->lock, false);
[cea12e9]193 } else {
194 /*
195 * Spurious interrupt.
196 */
197#ifdef CONFIG_DEBUG
[214ec25c]198 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
[cea12e9]199#endif
200 }
[7bcfbbc]201
202 if (!ack)
203 trap_virtual_eoi();
[cea12e9]204}
205
206void interrupt_init(void)
207{
[b3b7e14a]208 unsigned int i;
[cea12e9]209
210 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]211 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[cea12e9]212
213 for (i = 0; i < IRQ_COUNT; i++) {
214 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]215 exc_register(IVT_IRQBASE + i, "irq", true,
216 (iroutine_t) irq_interrupt);
[cea12e9]217 }
218
[b3b7e14a]219 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
220 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
221 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
222 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
223 exc_register(19, "simd_fp", true, (iroutine_t) simd_fp_exception);
[cea12e9]224
225#ifdef CONFIG_SMP
[b3b7e14a]226 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
227 (iroutine_t) tlb_shootdown_ipi);
[cea12e9]228#endif
[169587a]229}
230
[7f1c620]231void trap_virtual_enable_irqs(uint16_t irqmask)
[f761f1eb]232{
233 if (enable_irqs_function)
234 enable_irqs_function(irqmask);
235 else
[f651e80]236 panic("No enable_irqs_function.");
[f761f1eb]237}
238
[7f1c620]239void trap_virtual_disable_irqs(uint16_t irqmask)
[f761f1eb]240{
241 if (disable_irqs_function)
242 disable_irqs_function(irqmask);
243 else
[f651e80]244 panic("No disable_irqs_function.");
[f761f1eb]245}
246
[3222efd]247/** @}
[b45c443]248 */
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