source: mainline/kernel/arch/ia32/src/interrupt.c@ bab75df6

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bab75df6 was bab75df6, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Let kernel code get printf via the standard stdio header. Clean up unused includes.

  • Property mode set to 100644
File size: 7.5 KB
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[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[c5429fe]29/** @addtogroup kernel_ia32_interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch/interrupt.h>
[63e27ef]36#include <assert.h>
[204674e]37#include <syscall/syscall.h>
[bab75df6]38#include <stdio.h>
[02a99d2]39#include <debug.h>
[f761f1eb]40#include <panic.h>
[80d31883]41#include <arch/drivers/i8259.h>
[b2e121a]42#include <halt.h>
[f761f1eb]43#include <cpu.h>
44#include <arch/asm.h>
[169587a]45#include <mm/tlb.h>
[20d50a1]46#include <mm/as.h>
[cb4b61d]47#include <arch.h>
[1084a784]48#include <proc/thread.h>
[2382d09]49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
[5626277]52#include <ipc/sysipc.h>
53#include <interrupt.h>
[cea12e9]54#include <ddi/irq.h>
[e2b762ec]55#include <symtab.h>
[203deeb8]56#include <stacktrace.h>
[2ee1ccc]57#include <smp/smp_call.h>
[1066041]58#include <proc/task.h>
[e2b762ec]59
[f761f1eb]60/*
61 * Interrupt and exception dispatching.
62 */
63
[1433ecda]64void (*disable_irqs_function)(uint16_t irqmask) = NULL;
65void (*enable_irqs_function)(uint16_t irqmask) = NULL;
66void (*eoi_function)(void) = NULL;
[acc7ce4]67const char *irqs_info = NULL;
[f761f1eb]68
[22a28a69]69void istate_decode(istate_t *istate)
[97b64c9]70{
[f36787d7]71 printf("cs =%0#10" PRIx32 "\teip=%0#10" PRIx32 "\t"
72 "efl=%0#10" PRIx32 "\terr=%0#10" PRIx32 "\n",
73 istate->cs, istate->eip, istate->eflags, istate->error_word);
[a35b458]74
[f36787d7]75 printf("ds =%0#10" PRIx32 "\tes =%0#10" PRIx32 "\t"
76 "fs =%0#10" PRIx32 "\tgs =%0#10" PRIx32 "\n",
[0d1e976]77 istate->ds, istate->es, istate->fs, istate->gs);
[a35b458]78
[c9eb31c2]79 if (istate_from_uspace(istate))
[f36787d7]80 printf("ss =%0#10" PRIx32 "\n", istate->ss);
[a35b458]81
[f36787d7]82 printf("eax=%0#10" PRIx32 "\tebx=%0#10" PRIx32 "\t"
83 "ecx=%0#10" PRIx32 "\tedx=%0#10" PRIx32 "\n",
[0d1e976]84 istate->eax, istate->ebx, istate->ecx, istate->edx);
[a35b458]85
[f36787d7]86 printf("esi=%0#10" PRIx32 "\tedi=%0#10" PRIx32 "\t"
[fd57745c]87 "ebp=%0#10" PRIx32 "\tesp=%0#10" PRIx32 "\n",
[f36787d7]88 istate->esi, istate->edi, istate->ebp,
89 istate_from_uspace(istate) ? istate->esp :
[35ebd42]90 (uint32_t) &istate->esp);
[97b64c9]91}
[ab08b42]92
[cea12e9]93static void trap_virtual_eoi(void)
94{
95 if (eoi_function)
96 eoi_function();
97 else
[f651e80]98 panic("No eoi_function.");
[cea12e9]99
100}
101
[214ec25c]102static void null_interrupt(unsigned int n, istate_t *istate)
[f761f1eb]103{
[214ec25c]104 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[62baed17]105 panic_badtrap(istate, n, "Unserviced interrupt: %u.", n);
[f761f1eb]106}
107
[214ec25c]108static void de_fault(unsigned int n, istate_t *istate)
[4491338]109{
110 fault_if_from_uspace(istate, "Divide error.");
[62baed17]111 panic_badtrap(istate, n, "Divide error.");
[4491338]112}
113
[ae89656]114static void db_exception(unsigned int n, istate_t *istate)
115{
116 /*
117 * We need to provide at least an empty handler that does not panic
118 * if the exception appears to come from the kernel because the
119 * userspace can inject a kernel-level #DB after e.g. the SYSENTER
120 * instruction if the EFLAGS.TF is set.
121 */
122}
123
[2382d09]124/** General Protection Fault. */
[214ec25c]125static void gp_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[f761f1eb]126{
[2382d09]127 if (TASK) {
[da1bafb]128 irq_spinlock_lock(&TASK->lock, false);
129 size_t ver = TASK->arch.iomapver;
130 irq_spinlock_unlock(&TASK->lock, false);
[a35b458]131
[2382d09]132 if (CPU->arch.iomapver_copy != ver) {
133 /*
134 * This fault can be caused by an early access
135 * to I/O port because of an out-dated
136 * I/O Permission bitmap installed on CPU.
137 * Install the fresh copy and restart
138 * the instruction.
139 */
140 io_perm_bitmap_install();
141 return;
142 }
[f651e80]143 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]144 }
[62baed17]145 panic_badtrap(istate, n, "General protection fault.");
[f761f1eb]146}
147
[214ec25c]148static void ss_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[6de2480e]149{
[f651e80]150 fault_if_from_uspace(istate, "Stack fault.");
[62baed17]151 panic_badtrap(istate, n, "Stack fault.");
[6de2480e]152}
153
[214ec25c]154static void simd_fp_exception(unsigned int n __attribute__((unused)), istate_t *istate)
[3b05862f]155{
[7f1c620]156 uint32_t mxcsr;
[da1bafb]157 asm volatile (
[1433ecda]158 "stmxcsr %[mxcsr]\n"
159 : [mxcsr] "=m" (mxcsr)
[3b05862f]160 );
[a35b458]161
[7e752b2]162 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
163 mxcsr);
164 panic_badtrap(istate, n, "SIMD FP exception");
[3b05862f]165}
166
[214ec25c]167static void nm_fault(unsigned int n __attribute__((unused)),
[da1bafb]168 istate_t *istate __attribute__((unused)))
[6a27d63]169{
[da1bafb]170#ifdef CONFIG_FPU_LAZY
[b49f4ae]171 scheduler_fpu_lazy_request();
172#else
[f651e80]173 fault_if_from_uspace(istate, "FPU fault.");
[62baed17]174 panic_badtrap(istate, n, "FPU fault.");
[b49f4ae]175#endif
[6a27d63]176}
177
[cea12e9]178#ifdef CONFIG_SMP
[214ec25c]179static void tlb_shootdown_ipi(unsigned int n __attribute__((unused)),
[da1bafb]180 istate_t *istate __attribute__((unused)))
[f761f1eb]181{
[cea12e9]182 trap_virtual_eoi();
183 tlb_shootdown_ipi_recv();
[f761f1eb]184}
[2ee1ccc]185
186static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
187{
188 trap_virtual_eoi();
189 smp_call_ipi_recv();
190}
[cea12e9]191#endif
[f761f1eb]192
[cea12e9]193/** Handler of IRQ exceptions */
[214ec25c]194static void irq_interrupt(unsigned int n, istate_t *istate __attribute__((unused)))
[169587a]195{
[63e27ef]196 assert(n >= IVT_IRQBASE);
[a35b458]197
[214ec25c]198 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]199 bool ack = false;
[63e27ef]200 assert(inum < IRQ_COUNT);
201 assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[a35b458]202
[cea12e9]203 irq_t *irq = irq_dispatch_and_lock(inum);
204 if (irq) {
205 /*
206 * The IRQ handler was found.
207 */
[a35b458]208
[7bcfbbc]209 if (irq->preack) {
210 /* Send EOI before processing the interrupt */
211 trap_virtual_eoi();
212 ack = true;
213 }
[6cd9aa6]214 irq->handler(irq);
[da1bafb]215 irq_spinlock_unlock(&irq->lock, false);
[cea12e9]216 } else {
217 /*
218 * Spurious interrupt.
219 */
220#ifdef CONFIG_DEBUG
[214ec25c]221 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
[cea12e9]222#endif
223 }
[a35b458]224
[7bcfbbc]225 if (!ack)
226 trap_virtual_eoi();
[cea12e9]227}
228
229void interrupt_init(void)
230{
[b3b7e14a]231 unsigned int i;
[a35b458]232
[cea12e9]233 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]234 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[a35b458]235
[cea12e9]236 for (i = 0; i < IRQ_COUNT; i++) {
237 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]238 exc_register(IVT_IRQBASE + i, "irq", true,
239 (iroutine_t) irq_interrupt);
[cea12e9]240 }
[a35b458]241
[4b0206c]242 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
[ae89656]243 exc_register(VECTOR_DB, "db_exc", true, (iroutine_t) db_exception);
[4b0206c]244 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
245 exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
246 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
247 exc_register(VECTOR_XM, "simd_fp", true, (iroutine_t) simd_fp_exception);
[a35b458]248
[cea12e9]249#ifdef CONFIG_SMP
[b3b7e14a]250 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
251 (iroutine_t) tlb_shootdown_ipi);
[2ee1ccc]252 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
253 (iroutine_t) arch_smp_call_ipi_recv);
[cea12e9]254#endif
[169587a]255}
256
[7f1c620]257void trap_virtual_enable_irqs(uint16_t irqmask)
[f761f1eb]258{
259 if (enable_irqs_function)
260 enable_irqs_function(irqmask);
261 else
[f651e80]262 panic("No enable_irqs_function.");
[f761f1eb]263}
264
[7f1c620]265void trap_virtual_disable_irqs(uint16_t irqmask)
[f761f1eb]266{
267 if (disable_irqs_function)
268 disable_irqs_function(irqmask);
269 else
[f651e80]270 panic("No disable_irqs_function.");
[f761f1eb]271}
272
[3222efd]273/** @}
[b45c443]274 */
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