source: mainline/kernel/arch/ia32/src/interrupt.c@ 623b49f1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 623b49f1 was df4ed85, checked in by Jakub Jermar <jakub@…>, 18 years ago

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[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[b6529ae]29/** @addtogroup ia32interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch/interrupt.h>
[204674e]36#include <syscall/syscall.h>
[f761f1eb]37#include <print.h>
[02a99d2]38#include <debug.h>
[f761f1eb]39#include <panic.h>
[80d31883]40#include <arch/drivers/i8259.h>
[f761f1eb]41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
[169587a]44#include <mm/tlb.h>
[20d50a1]45#include <mm/as.h>
[cb4b61d]46#include <arch.h>
[ab08b42]47#include <symtab.h>
[1084a784]48#include <proc/thread.h>
[2382d09]49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
[5626277]52#include <ipc/sysipc.h>
53#include <interrupt.h>
[cea12e9]54#include <ddi/irq.h>
[f761f1eb]55
56/*
57 * Interrupt and exception dispatching.
58 */
59
[7f1c620]60void (* disable_irqs_function)(uint16_t irqmask) = NULL;
61void (* enable_irqs_function)(uint16_t irqmask) = NULL;
[f761f1eb]62void (* eoi_function)(void) = NULL;
63
[cea12e9]64void decode_istate(istate_t *istate)
[97b64c9]65{
66 char *symbol = get_symtab_entry(istate->eip);
67
68 if (!symbol)
69 symbol = "";
70
71 if (CPU)
72 printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
73 else
74 printf("----------------EXCEPTION OCCURED----------------\n");
75
[cf85e24c]76 printf("%%eip: %#x (%s)\n",istate->eip,symbol);
77 printf("ERROR_WORD=%#x\n", istate->error_word);
78 printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
79 printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
[53f9821]80#ifdef CONFIG_DEBUG_ALLREGS
[cf85e24c]81 printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx);
[53f9821]82#endif
[cf85e24c]83 printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
84 printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
[97b64c9]85}
[ab08b42]86
[cea12e9]87static void trap_virtual_eoi(void)
88{
89 if (eoi_function)
90 eoi_function();
91 else
92 panic("no eoi_function\n");
93
94}
95
96static void null_interrupt(int n, istate_t *istate)
[f761f1eb]97{
[874621f]98 fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
99
[cea12e9]100 decode_istate(istate);
[25d7709]101 panic("unserviced interrupt: %d\n", n);
[f761f1eb]102}
103
[2382d09]104/** General Protection Fault. */
[cea12e9]105static void gp_fault(int n, istate_t *istate)
[f761f1eb]106{
[2382d09]107 if (TASK) {
108 count_t ver;
109
110 spinlock_lock(&TASK->lock);
111 ver = TASK->arch.iomapver;
112 spinlock_unlock(&TASK->lock);
113
114 if (CPU->arch.iomapver_copy != ver) {
115 /*
116 * This fault can be caused by an early access
117 * to I/O port because of an out-dated
118 * I/O Permission bitmap installed on CPU.
119 * Install the fresh copy and restart
120 * the instruction.
121 */
122 io_perm_bitmap_install();
123 return;
124 }
[874621f]125 fault_if_from_uspace(istate, "general protection fault");
[2382d09]126 }
127
[cea12e9]128 decode_istate(istate);
[f4a61ef]129 panic("general protection fault\n");
[f761f1eb]130}
131
[cea12e9]132static void ss_fault(int n, istate_t *istate)
[6de2480e]133{
[874621f]134 fault_if_from_uspace(istate, "stack fault");
135
[cea12e9]136 decode_istate(istate);
[747a2476]137 panic("stack fault\n");
[6de2480e]138}
139
[cea12e9]140static void simd_fp_exception(int n, istate_t *istate)
[3b05862f]141{
[7f1c620]142 uint32_t mxcsr;
[3b05862f]143 asm
144 (
145 "stmxcsr %0;\n"
146 :"=m"(mxcsr)
147 );
[fbf7b4c]148 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
[7f1c620]149 (unative_t)mxcsr);
[874621f]150
[cea12e9]151 decode_istate(istate);
[7f1c620]152 printf("MXCSR: %#zx\n",(unative_t)(mxcsr));
[3b05862f]153 panic("SIMD FP exception(19)\n");
154}
155
[cea12e9]156static void nm_fault(int n, istate_t *istate)
[6a27d63]157{
[5f85c91]158#ifdef CONFIG_FPU_LAZY
[b49f4ae]159 scheduler_fpu_lazy_request();
160#else
[874621f]161 fault_if_from_uspace(istate, "fpu fault");
[b49f4ae]162 panic("fpu fault");
163#endif
[6a27d63]164}
165
[cea12e9]166#ifdef CONFIG_SMP
167static void tlb_shootdown_ipi(int n, istate_t *istate)
[f761f1eb]168{
[cea12e9]169 trap_virtual_eoi();
170 tlb_shootdown_ipi_recv();
[f761f1eb]171}
[cea12e9]172#endif
[f761f1eb]173
[cea12e9]174/** Handler of IRQ exceptions */
175static void irq_interrupt(int n, istate_t *istate)
[169587a]176{
[cea12e9]177 ASSERT(n >= IVT_IRQBASE);
178
179 int inum = n - IVT_IRQBASE;
180 ASSERT(inum < IRQ_COUNT);
181 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
182
183 irq_t *irq = irq_dispatch_and_lock(inum);
184 if (irq) {
185 /*
186 * The IRQ handler was found.
187 */
188 irq->handler(irq, irq->arg);
189 spinlock_unlock(&irq->lock);
190 } else {
191 /*
192 * Spurious interrupt.
193 */
194#ifdef CONFIG_DEBUG
195 printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum);
196#endif
197 }
[169587a]198 trap_virtual_eoi();
[cea12e9]199}
200
201void interrupt_init(void)
202{
203 int i;
204
205 for (i = 0; i < IVT_ITEMS; i++)
206 exc_register(i, "null", (iroutine) null_interrupt);
207
208 for (i = 0; i < IRQ_COUNT; i++) {
209 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
210 exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt);
211 }
212
213 exc_register(7, "nm_fault", (iroutine) nm_fault);
214 exc_register(12, "ss_fault", (iroutine) ss_fault);
215 exc_register(13, "gp_fault", (iroutine) gp_fault);
216 exc_register(19, "simd_fp", (iroutine) simd_fp_exception);
217
218#ifdef CONFIG_SMP
219 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi);
220#endif
[169587a]221}
222
[7f1c620]223void trap_virtual_enable_irqs(uint16_t irqmask)
[f761f1eb]224{
225 if (enable_irqs_function)
226 enable_irqs_function(irqmask);
227 else
[02a99d2]228 panic("no enable_irqs_function\n");
[f761f1eb]229}
230
[7f1c620]231void trap_virtual_disable_irqs(uint16_t irqmask)
[f761f1eb]232{
233 if (disable_irqs_function)
234 disable_irqs_function(irqmask);
235 else
[02a99d2]236 panic("no disable_irqs_function\n");
[f761f1eb]237}
238
[3222efd]239/** @}
[b45c443]240 */
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