source: mainline/kernel/arch/ia32/src/interrupt.c@ 202f57b

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 202f57b was 0d1e976, checked in by Jakub Jermar <jakub@…>, 15 years ago

Sync ia32 istate_decode() with the formatting used by the amd64 version.

  • Property mode set to 100644
File size: 6.5 KB
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[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[b6529ae]29/** @addtogroup ia32interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch/interrupt.h>
[204674e]36#include <syscall/syscall.h>
[f761f1eb]37#include <print.h>
[02a99d2]38#include <debug.h>
[f761f1eb]39#include <panic.h>
[80d31883]40#include <arch/drivers/i8259.h>
[f761f1eb]41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
[169587a]44#include <mm/tlb.h>
[20d50a1]45#include <mm/as.h>
[cb4b61d]46#include <arch.h>
[1084a784]47#include <proc/thread.h>
[2382d09]48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
[5626277]51#include <ipc/sysipc.h>
52#include <interrupt.h>
[cea12e9]53#include <ddi/irq.h>
[e2b762ec]54#include <symtab.h>
[203deeb8]55#include <stacktrace.h>
[e2b762ec]56
[f761f1eb]57/*
58 * Interrupt and exception dispatching.
59 */
60
[7f1c620]61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
[f761f1eb]63void (* eoi_function)(void) = NULL;
64
[22a28a69]65void istate_decode(istate_t *istate)
[97b64c9]66{
[0d1e976]67 printf("cs =%p\teip=%p\tefl=%p\terr=%p\n",
68 istate->cs, istate->eip, istate->eflags, istate->error_word);
[c9eb31c2]69
[0d1e976]70 printf("ds =%p\tes =%p\tfs =%p\tgs =%p\n",
71 istate->ds, istate->es, istate->fs, istate->gs);
[c9eb31c2]72 if (istate_from_uspace(istate))
[0d1e976]73 printf("ss =%p\n", istate->ss);
[c9eb31c2]74
[0d1e976]75 printf("eax=%p\tebx=%p\tecx=%p\tedx=%p\n",
76 istate->eax, istate->ebx, istate->ecx, istate->edx);
77 printf("esi=%p\tedi=%p\tebp=%p\tesp=%p\n",
78 istate->esi, istate->edi, istate->ebp,
79 istate_from_uspace(istate) ? istate->esp : (uintptr_t)&istate->esp);
[97b64c9]80}
[ab08b42]81
[cea12e9]82static void trap_virtual_eoi(void)
83{
84 if (eoi_function)
85 eoi_function();
86 else
[f651e80]87 panic("No eoi_function.");
[cea12e9]88
89}
90
[214ec25c]91static void null_interrupt(unsigned int n, istate_t *istate)
[f761f1eb]92{
[214ec25c]93 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[62baed17]94 panic_badtrap(istate, n, "Unserviced interrupt: %u.", n);
[f761f1eb]95}
96
[214ec25c]97static void de_fault(unsigned int n, istate_t *istate)
[4491338]98{
99 fault_if_from_uspace(istate, "Divide error.");
[62baed17]100 panic_badtrap(istate, n, "Divide error.");
[4491338]101}
102
[2382d09]103/** General Protection Fault. */
[214ec25c]104static void gp_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[f761f1eb]105{
[2382d09]106 if (TASK) {
[da1bafb]107 irq_spinlock_lock(&TASK->lock, false);
108 size_t ver = TASK->arch.iomapver;
109 irq_spinlock_unlock(&TASK->lock, false);
[2382d09]110
111 if (CPU->arch.iomapver_copy != ver) {
112 /*
113 * This fault can be caused by an early access
114 * to I/O port because of an out-dated
115 * I/O Permission bitmap installed on CPU.
116 * Install the fresh copy and restart
117 * the instruction.
118 */
119 io_perm_bitmap_install();
120 return;
121 }
[f651e80]122 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]123 }
[62baed17]124 panic_badtrap(istate, n, "General protection fault.");
[f761f1eb]125}
126
[214ec25c]127static void ss_fault(unsigned int n __attribute__((unused)), istate_t *istate)
[6de2480e]128{
[f651e80]129 fault_if_from_uspace(istate, "Stack fault.");
[62baed17]130 panic_badtrap(istate, n, "Stack fault.");
[6de2480e]131}
132
[214ec25c]133static void simd_fp_exception(unsigned int n __attribute__((unused)), istate_t *istate)
[3b05862f]134{
[7f1c620]135 uint32_t mxcsr;
[da1bafb]136 asm volatile (
[add04f7]137 "stmxcsr %[mxcsr]\n"
138 : [mxcsr] "=m" (mxcsr)
[3b05862f]139 );
[da1bafb]140
[62baed17]141 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0.8x.",
[e8a0b90]142 (unative_t) mxcsr);
[62baed17]143 panic_badtrap(istate, n, "SIMD FP exception, MXCSR=%#0.8x");
[3b05862f]144}
145
[214ec25c]146static void nm_fault(unsigned int n __attribute__((unused)),
[da1bafb]147 istate_t *istate __attribute__((unused)))
[6a27d63]148{
[da1bafb]149#ifdef CONFIG_FPU_LAZY
[b49f4ae]150 scheduler_fpu_lazy_request();
151#else
[f651e80]152 fault_if_from_uspace(istate, "FPU fault.");
[62baed17]153 panic_badtrap(istate, n, "FPU fault.");
[b49f4ae]154#endif
[6a27d63]155}
156
[cea12e9]157#ifdef CONFIG_SMP
[214ec25c]158static void tlb_shootdown_ipi(unsigned int n __attribute__((unused)),
[da1bafb]159 istate_t *istate __attribute__((unused)))
[f761f1eb]160{
[cea12e9]161 trap_virtual_eoi();
162 tlb_shootdown_ipi_recv();
[f761f1eb]163}
[cea12e9]164#endif
[f761f1eb]165
[cea12e9]166/** Handler of IRQ exceptions */
[214ec25c]167static void irq_interrupt(unsigned int n, istate_t *istate __attribute__((unused)))
[169587a]168{
[cea12e9]169 ASSERT(n >= IVT_IRQBASE);
170
[214ec25c]171 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]172 bool ack = false;
[cea12e9]173 ASSERT(inum < IRQ_COUNT);
174 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[7bcfbbc]175
[cea12e9]176 irq_t *irq = irq_dispatch_and_lock(inum);
177 if (irq) {
178 /*
179 * The IRQ handler was found.
180 */
[da1bafb]181
[7bcfbbc]182 if (irq->preack) {
183 /* Send EOI before processing the interrupt */
184 trap_virtual_eoi();
185 ack = true;
186 }
[6cd9aa6]187 irq->handler(irq);
[da1bafb]188 irq_spinlock_unlock(&irq->lock, false);
[cea12e9]189 } else {
190 /*
191 * Spurious interrupt.
192 */
193#ifdef CONFIG_DEBUG
[214ec25c]194 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
[cea12e9]195#endif
196 }
[7bcfbbc]197
198 if (!ack)
199 trap_virtual_eoi();
[cea12e9]200}
201
202void interrupt_init(void)
203{
[b3b7e14a]204 unsigned int i;
[cea12e9]205
206 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]207 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[cea12e9]208
209 for (i = 0; i < IRQ_COUNT; i++) {
210 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]211 exc_register(IVT_IRQBASE + i, "irq", true,
212 (iroutine_t) irq_interrupt);
[cea12e9]213 }
214
[b3b7e14a]215 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
216 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
217 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
218 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
219 exc_register(19, "simd_fp", true, (iroutine_t) simd_fp_exception);
[cea12e9]220
221#ifdef CONFIG_SMP
[b3b7e14a]222 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
223 (iroutine_t) tlb_shootdown_ipi);
[cea12e9]224#endif
[169587a]225}
226
[7f1c620]227void trap_virtual_enable_irqs(uint16_t irqmask)
[f761f1eb]228{
229 if (enable_irqs_function)
230 enable_irqs_function(irqmask);
231 else
[f651e80]232 panic("No enable_irqs_function.");
[f761f1eb]233}
234
[7f1c620]235void trap_virtual_disable_irqs(uint16_t irqmask)
[f761f1eb]236{
237 if (disable_irqs_function)
238 disable_irqs_function(irqmask);
239 else
[f651e80]240 panic("No disable_irqs_function.");
[f761f1eb]241}
242
[3222efd]243/** @}
[b45c443]244 */
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