source: mainline/kernel/arch/ia32/src/ia32.c@ 66eb2c8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 66eb2c8 was 16d71f41, checked in by Martin Decky <martin@…>, 19 years ago

ia32: mouse support, mouse regrab is still broken

  • Property mode set to 100644
File size: 3.8 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36
37#include <arch/types.h>
38#include <typedefs.h>
39
40#include <arch/pm.h>
41
42#include <arch/drivers/ega.h>
43#include <arch/drivers/vesa.h>
44#include <genarch/kbd/i8042.h>
45#include <arch/drivers/i8254.h>
46#include <arch/drivers/i8259.h>
47
48#include <arch/context.h>
49
50#include <config.h>
51
52#include <arch/interrupt.h>
53#include <arch/asm.h>
54#include <genarch/acpi/acpi.h>
55
56#include <arch/bios/bios.h>
57
58#include <arch/mm/memory_init.h>
59#include <interrupt.h>
60#include <ddi/irq.h>
61#include <arch/debugger.h>
62#include <proc/thread.h>
63#include <syscall/syscall.h>
64#include <console/console.h>
65#include <ddi/device.h>
66
67#ifdef CONFIG_SMP
68#include <arch/smp/apic.h>
69#endif
70
71void arch_pre_mm_init(void)
72{
73 pm_init();
74
75 if (config.cpu_active == 1) {
76 interrupt_init();
77 bios_init();
78
79 /* PIC */
80 i8259_init();
81 }
82}
83
84void arch_post_mm_init(void)
85{
86 if (config.cpu_active == 1) {
87 /* Initialize IRQ routing */
88 irq_init(IRQ_COUNT, IRQ_COUNT);
89
90 /* hard clock */
91 i8254_init();
92
93#ifdef CONFIG_FB
94 if (vesa_present())
95 vesa_init();
96 else
97#endif
98 ega_init(); /* video */
99
100 /* Enable debugger */
101 debugger_init();
102 /* Merge all memory zones to 1 big zone */
103 zone_merge_all();
104 }
105}
106
107void arch_post_cpu_init()
108{
109#ifdef CONFIG_SMP
110 if (config.cpu_active > 1) {
111 l_apic_init();
112 l_apic_debug();
113 }
114#endif
115}
116
117void arch_pre_smp_init(void)
118{
119 if (config.cpu_active == 1) {
120 memory_print_map();
121
122 #ifdef CONFIG_SMP
123 acpi_init();
124 #endif /* CONFIG_SMP */
125 }
126}
127
128void arch_post_smp_init(void)
129{
130 /* keyboard controller */
131 i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
132}
133
134void calibrate_delay_loop(void)
135{
136 i8254_calibrate_delay_loop();
137 if (config.cpu_active == 1) {
138 /*
139 * This has to be done only on UP.
140 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
141 */
142 i8254_normal_operation();
143 }
144}
145
146/** Set thread-local-storage pointer
147 *
148 * TLS pointer is set in GS register. That means, the GS contains
149 * selector, and the descriptor->base is the correct address.
150 */
151unative_t sys_tls_set(unative_t addr)
152{
153 THREAD->arch.tls = addr;
154 set_tls_desc(addr);
155
156 return 0;
157}
158
159/** Acquire console back for kernel
160 *
161 */
162void arch_grab_console(void)
163{
164 i8042_grab();
165}
166/** Return console to userspace
167 *
168 */
169void arch_release_console(void)
170{
171 i8042_release();
172}
173
174/** @}
175 */
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