source: mainline/kernel/arch/ia32/src/ia32.c

Last change on this file was 3526f4f3, checked in by Jiri Svoboda <jiri@…>, 13 months ago

On 486 we cannot call read_msr()/write_msr()
  • Property mode set to 100644
File size: 7.0 KB
Line 
1/*
2 * Copyright (c) 2024 Jiri Svoboda
3 * Copyright (c) 2001-2004 Jakub Jermar
4 * Copyright (c) 2009 Martin Decky
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * - Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * - Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * - The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31/** @addtogroup kernel_ia32
32 * @{
33 */
34/** @file
35 */
36
37#include <arch.h>
38#include <arch/arch.h>
39#include <stdint.h>
40#include <errno.h>
41#include <memw.h>
42#include <interrupt.h>
43#include <console/console.h>
44#include <syscall/syscall.h>
45#include <sysinfo/sysinfo.h>
46#include <arch/bios/bios.h>
47#include <arch/boot/boot.h>
48#include <arch/drivers/i8254.h>
49#include <genarch/acpi/acpi.h>
50#include <genarch/drivers/ega/ega.h>
51#include <genarch/drivers/i8042/i8042.h>
52#include <genarch/drivers/i8259/i8259.h>
53#include <genarch/drivers/ns16550/ns16550.h>
54#include <genarch/drivers/legacy/ia32/io.h>
55#include <genarch/fb/bfb.h>
56#include <genarch/kbrd/kbrd.h>
57#include <genarch/srln/srln.h>
58#include <genarch/multiboot/multiboot.h>
59#include <genarch/multiboot/multiboot2.h>
60#include <genarch/pic/pic_ops.h>
61#include <arch/pm.h>
62#include <arch/vreg.h>
63#include <arch/mm/pat.h>
64
65#ifdef CONFIG_SMP
66#include <arch/smp/apic.h>
67#endif
68
69static void ia32_pre_mm_init(void);
70static void ia32_post_mm_init(void);
71static void ia32_post_cpu_init(void);
72static void ia32_pre_smp_init(void);
73static void ia32_post_smp_init(void);
74
75arch_ops_t ia32_ops = {
76 .pre_mm_init = ia32_pre_mm_init,
77 .post_mm_init = ia32_post_mm_init,
78 .post_cpu_init = ia32_post_cpu_init,
79 .pre_smp_init = ia32_pre_smp_init,
80 .post_smp_init = ia32_post_smp_init,
81};
82
83arch_ops_t *arch_ops = &ia32_ops;
84
85/** Perform ia32-specific initialization before main_bsp() is called.
86 *
87 * @param signature Multiboot signature.
88 * @param info Multiboot information structure.
89 *
90 */
91void ia32_pre_main(uint32_t signature, void *info)
92{
93 /* Parse multiboot information obtained from the bootloader. */
94 multiboot_info_parse(signature, (multiboot_info_t *) info);
95 multiboot2_info_parse(signature, (multiboot2_info_t *) info);
96
97#ifdef CONFIG_SMP
98 size_t unmapped_size = (uintptr_t) unmapped_end - BOOT_OFFSET;
99 /* Copy AP bootstrap routines below 1 MB. */
100 memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET, unmapped_size);
101#endif
102}
103
104void ia32_pre_mm_init(void)
105{
106 pm_init();
107
108#ifndef PROCESSOR_i486
109 /* Use PCD+PWT bit combination in PTE to mean write-combining mode. */
110 if (pat_supported())
111 pat_set_mapping(false, true, true, PAT_TYPE_WRITE_COMBINING);
112#endif
113
114 if (config.cpu_active == 1) {
115 interrupt_init();
116 bios_init();
117
118 /* PIC */
119 i8259_init((i8259_t *) I8259_PIC0_BASE,
120 (i8259_t *) I8259_PIC1_BASE, IVT_IRQBASE);
121
122 /* Set PIC operations. */
123 pic_ops = &i8259_pic_ops;
124 }
125}
126
127void ia32_post_mm_init(void)
128{
129 vreg_init();
130
131 if (config.cpu_active == 1) {
132 /* Initialize IRQ routing */
133 irq_init(IRQ_COUNT, IRQ_COUNT);
134
135 /* hard clock */
136 i8254_init();
137
138#if (defined(CONFIG_FB) || defined(CONFIG_EGA))
139 bool bfb = false;
140#endif
141
142#ifdef CONFIG_FB
143 bfb = bfb_init();
144#endif
145
146#ifdef CONFIG_EGA
147 if (!bfb) {
148 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
149 if (egadev)
150 stdout_wire(egadev);
151 }
152#endif
153
154 /* Merge all memory zones to 1 big zone */
155 zone_merge_all();
156 }
157}
158
159void ia32_post_cpu_init(void)
160{
161#ifdef CONFIG_SMP
162 if (config.cpu_active > 1) {
163 l_apic_init();
164 l_apic_debug();
165 }
166#endif
167}
168
169void ia32_pre_smp_init(void)
170{
171 if (config.cpu_active == 1) {
172#ifdef CONFIG_SMP
173 acpi_init();
174#endif /* CONFIG_SMP */
175 }
176}
177
178void ia32_post_smp_init(void)
179{
180 /* Currently the only supported platform for ia32 is 'pc'. */
181 static const char *platform = "pc";
182
183 sysinfo_set_item_data("platform", NULL, (void *) platform,
184 str_size(platform));
185
186#ifdef CONFIG_PC_KBD
187 /*
188 * Initialize the i8042 controller. Then initialize the keyboard
189 * module and connect it to i8042. Enable keyboard interrupts.
190 */
191 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
192 if (i8042_instance) {
193 kbrd_instance_t *kbrd_instance = kbrd_init();
194 if (kbrd_instance) {
195 indev_t *sink = stdin_wire();
196 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
197 i8042_wire(i8042_instance, kbrd);
198 pic_ops->enable_irqs(1 << IRQ_KBD);
199 pic_ops->enable_irqs(1 << IRQ_MOUSE);
200 }
201 }
202#endif
203
204#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
205 /*
206 * Initialize the ns16550 controller.
207 */
208#ifdef CONFIG_NS16550_OUT
209 outdev_t *ns16550_out;
210 outdev_t **ns16550_out_ptr = &ns16550_out;
211#else
212 outdev_t **ns16550_out_ptr = NULL;
213#endif
214 ns16550_instance_t *ns16550_instance =
215 ns16550_init(NS16550_BASE, 0, IRQ_NS16550, NULL, NULL,
216 ns16550_out_ptr);
217 if (ns16550_instance) {
218 ns16550_format_set(ns16550_instance, 38400,
219 LCR_PARITY_NONE | LCR_STOP_BIT_TWO | LCR_WORD_LEN_8);
220#ifdef CONFIG_NS16550
221 srln_instance_t *srln_instance = srln_init();
222 if (srln_instance) {
223 indev_t *sink = stdin_wire();
224 indev_t *srln = srln_wire(srln_instance, sink);
225 ns16550_wire(ns16550_instance, srln);
226 pic_ops->enable_irqs(1 << IRQ_NS16550);
227 }
228#endif
229#ifdef CONFIG_NS16550_OUT
230 if (ns16550_out) {
231 stdout_wire(ns16550_out);
232 }
233#endif
234 }
235#endif
236
237 sysinfo_set_item_val(pic_ops->get_name(), NULL, true);
238}
239
240void calibrate_delay_loop(void)
241{
242 i8254_calibrate_delay_loop();
243 if (config.cpu_active == 1) {
244 /*
245 * This has to be done only on UP.
246 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
247 */
248 i8254_normal_operation();
249 }
250}
251
252/** Construct function pointer
253 *
254 * @param fptr function pointer structure
255 * @param addr function address
256 * @param caller calling function address
257 *
258 * @return address of the function pointer
259 *
260 */
261void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
262{
263 return addr;
264}
265
266void arch_reboot(void)
267{
268#ifdef CONFIG_PC_KBD
269 i8042_cpu_reset((i8042_t *) I8042_BASE);
270#endif
271}
272
273void irq_initialize_arch(irq_t *irq)
274{
275 (void) irq;
276}
277
278/** @}
279 */
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