source: mainline/kernel/arch/ia32/src/ia32.c@ 8844e70

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8844e70 was 235d31d, checked in by Jakub Jermar <jakub@…>, 11 years ago

Merge the CHT pre-integration branch

This branch contains:

  • the merge of lp:~adam-hraska+lp/helenos/rcu, which brings:
  • a new preemptible kernel RCU variant called A-RCU,
  • a preemptible variant of Podzimek's non-preemptible kernel RCU and
  • a new variant of usersace RCU,
  • a new concurrent hash table (CHT) implementation based on RCU,
  • a deployment of CHT in kernel futex handling,
  • a deployment of the userspace RCU in the implementation of upgradable futexes,

all described in Adam Hraska's master thesis named Read-Copy-Update
for HelenOS, defended in 2013 at MFF UK; furthemore, the branch
fixes two synchronization bugs in condvars and waitq, respectively:

  • revid:adam.hraska+hos@gmail.com-20121116144921-3to9u1tn1sg07rg7
  • revid:adam.hraska+hos@gmail.com-20121116173623-km7gwtqixwudpe66
  • build fixes required to pass make check
  • overhaul of ia64 and sparc64 trap handling, to allow exc_dispatch() to be used now when the kernel is more picky about CPU state accounting
  • an important fix of the sparc64/sun4v preemptible trap handler
  • various other fixes of issues discovered on non-x86 architectures
  • Property mode set to 100644
File size: 6.3 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[deca67b]3 * Copyright (c) 2009 Jiri Svoboda
4 * Copyright (c) 2009 Martin Decky
[f761f1eb]5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * - Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * - Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * - The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
[06e1e95]31/** @addtogroup ia32
[b45c443]32 * @{
33 */
34/** @file
35 */
36
[f761f1eb]37#include <arch.h>
[d99c1d2]38#include <typedefs.h>
[d8db519]39#include <errno.h>
40#include <memstr.h>
[fcfac420]41#include <interrupt.h>
[41d33ac]42#include <console/console.h>
[d8db519]43#include <syscall/syscall.h>
[4c7257b]44#include <sysinfo/sysinfo.h>
[d8db519]45#include <arch/bios/bios.h>
[deca67b]46#include <arch/boot/boot.h>
[d8db519]47#include <arch/drivers/i8254.h>
48#include <arch/drivers/i8259.h>
49#include <genarch/acpi/acpi.h>
50#include <genarch/drivers/ega/ega.h>
51#include <genarch/drivers/i8042/i8042.h>
[3296df5]52#include <genarch/drivers/ns16550/ns16550.h>
[d8db519]53#include <genarch/drivers/legacy/ia32/io.h>
54#include <genarch/fb/bfb.h>
55#include <genarch/kbrd/kbrd.h>
[3296df5]56#include <genarch/srln/srln.h>
[d8db519]57#include <genarch/multiboot/multiboot.h>
58#include <genarch/multiboot/multiboot2.h>
[ad36bd6]59
[26678e5]60#ifdef CONFIG_SMP
61#include <arch/smp/apic.h>
62#endif
63
[5d8d71e]64/** Perform ia32-specific initialization before main_bsp() is called.
[deca67b]65 *
[1f5c9c96]66 * @param signature Multiboot signature.
67 * @param info Multiboot information structure.
68 *
[deca67b]69 */
[1f5c9c96]70void arch_pre_main(uint32_t signature, void *info)
[deca67b]71{
[5d8d71e]72 /* Parse multiboot information obtained from the bootloader. */
[1f5c9c96]73 multiboot_info_parse(signature, (multiboot_info_t *) info);
74 multiboot2_info_parse(signature, (multiboot2_info_t *) info);
[deca67b]75
76#ifdef CONFIG_SMP
77 /* Copy AP bootstrap routines below 1 MB. */
78 memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
79 (size_t) &_hardcoded_unmapped_size);
80#endif
81}
82
[f07bba5]83void arch_pre_mm_init(void)
[f761f1eb]84{
85 pm_init();
86
87 if (config.cpu_active == 1) {
[cea12e9]88 interrupt_init();
[dba84ff]89 bios_init();
[5dce48b9]90
[cea12e9]91 /* PIC */
92 i8259_init();
[f761f1eb]93 }
94}
95
[6ba143d]96void arch_post_mm_init(void)
[7eade45]97{
[425913b]98 if (config.cpu_active == 1) {
[cea12e9]99 /* Initialize IRQ routing */
100 irq_init(IRQ_COUNT, IRQ_COUNT);
101
102 /* hard clock */
103 i8254_init();
[ec944b1]104
[a71c158]105#if (defined(CONFIG_FB) || defined(CONFIG_EGA))
[1f5c9c96]106 bool bfb = false;
[a71c158]107#endif
108
[22cf454d]109#ifdef CONFIG_FB
[1f5c9c96]110 bfb = bfb_init();
[22cf454d]111#endif
[a71c158]112
[ec944b1]113#ifdef CONFIG_EGA
[1f5c9c96]114 if (!bfb) {
[a71c158]115 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
116 if (egadev)
117 stdout_wire(egadev);
118 }
[ec944b1]119#endif
[22cf454d]120
[381465e]121 /* Merge all memory zones to 1 big zone */
122 zone_merge_all();
[babcb148]123 }
124}
125
[49e6c6b4]126void arch_post_cpu_init(void)
[26678e5]127{
128#ifdef CONFIG_SMP
[49eb681]129 if (config.cpu_active > 1) {
[26678e5]130 l_apic_init();
131 l_apic_debug();
132 }
133#endif
134}
135
[7453929]136void arch_pre_smp_init(void)
[babcb148]137{
138 if (config.cpu_active == 1) {
[f619ec11]139#ifdef CONFIG_SMP
[85bfdcc8]140 acpi_init();
[f619ec11]141#endif /* CONFIG_SMP */
[425913b]142 }
[7eade45]143}
144
[7453929]145void arch_post_smp_init(void)
146{
[eff1f033]147 /* Currently the only supported platform for ia32 is 'pc'. */
148 static const char *platform = "pc";
149
150 sysinfo_set_item_data("platform", NULL, (void *) platform,
151 str_size(platform));
152
[2a34e4c]153#ifdef CONFIG_PC_KBD
[411b6a6]154 /*
[2a34e4c]155 * Initialize the i8042 controller. Then initialize the keyboard
156 * module and connect it to i8042. Enable keyboard interrupts.
[411b6a6]157 */
[c2417bc]158 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
159 if (i8042_instance) {
160 kbrd_instance_t *kbrd_instance = kbrd_init();
161 if (kbrd_instance) {
162 indev_t *sink = stdin_wire();
163 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
164 i8042_wire(i8042_instance, kbrd);
165 trap_virtual_enable_irqs(1 << IRQ_KBD);
[385a3d6]166 trap_virtual_enable_irqs(1 << IRQ_MOUSE);
[c2417bc]167 }
[2a34e4c]168 }
169#endif
[3296df5]170
[6bbe470]171#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
[3296df5]172 /*
[6bbe470]173 * Initialize the ns16550 controller.
[3296df5]174 */
[21b6307]175#ifdef CONFIG_NS16550_OUT
176 outdev_t *ns16550_out;
177 outdev_t **ns16550_out_ptr = &ns16550_out;
178#else
179 outdev_t **ns16550_out_ptr = NULL;
180#endif
[3296df5]181 ns16550_instance_t *ns16550_instance
[21b6307]182 = ns16550_init((ns16550_t *) NS16550_BASE, IRQ_NS16550, NULL, NULL,
183 ns16550_out_ptr);
[3296df5]184 if (ns16550_instance) {
[6bbe470]185#ifdef CONFIG_NS16550
[3296df5]186 srln_instance_t *srln_instance = srln_init();
187 if (srln_instance) {
188 indev_t *sink = stdin_wire();
189 indev_t *srln = srln_wire(srln_instance, sink);
190 ns16550_wire(ns16550_instance, srln);
[5030acad]191 trap_virtual_enable_irqs(1 << IRQ_NS16550);
[3296df5]192 }
193#endif
[6bbe470]194#ifdef CONFIG_NS16550_OUT
195 if (ns16550_out) {
196 stdout_wire(ns16550_out);
197 }
198#endif
[24b06199]199 }
200#endif
[849ed54]201
[acc7ce4]202 if (irqs_info != NULL)
203 sysinfo_set_item_val(irqs_info, NULL, true);
[7453929]204}
205
[f761f1eb]206void calibrate_delay_loop(void)
207{
208 i8254_calibrate_delay_loop();
[f701b236]209 if (config.cpu_active == 1) {
210 /*
211 * This has to be done only on UP.
212 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
213 */
214 i8254_normal_operation();
215 }
[f761f1eb]216}
[281b607]217
[e1be3b6]218/** Set thread-local-storage pointer
[281b607]219 *
[3b712407]220 * TLS pointer is set in GS register. That means, the GS contains
221 * selector, and the descriptor->base is the correct address.
[281b607]222 */
[d8db519]223sysarg_t sys_tls_set(uintptr_t addr)
[281b607]224{
[a6d4ceb]225 THREAD->arch.tls = addr;
[281b607]226 set_tls_desc(addr);
[a71c158]227
[d8db519]228 return EOK;
[281b607]229}
[41d33ac]230
[6da1013f]231/** Construct function pointer
232 *
233 * @param fptr function pointer structure
234 * @param addr function address
235 * @param caller calling function address
236 *
237 * @return address of the function pointer
238 *
239 */
240void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
241{
242 return addr;
243}
244
[149d14e5]245void arch_reboot(void)
246{
247#ifdef CONFIG_PC_KBD
248 i8042_cpu_reset((i8042_t *) I8042_BASE);
249#endif
250}
251
[3a2f8aa]252void irq_initialize_arch(irq_t *irq)
253{
254 (void) irq;
255}
256
[06e1e95]257/** @}
[b45c443]258 */
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