[f761f1eb] | 1 | /*
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| 2 | * Copyright (C) 2001-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup ia32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[f761f1eb] | 35 | #include <arch.h>
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| 36 |
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| 37 | #include <arch/types.h>
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| 38 | #include <typedefs.h>
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| 39 |
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| 40 | #include <arch/pm.h>
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| 41 |
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[018f95a] | 42 | #include <arch/drivers/ega.h>
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[80d31883] | 43 | #include <arch/drivers/vesa.h>
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[287920f] | 44 | #include <genarch/kbd/i8042.h>
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[80d31883] | 45 | #include <arch/drivers/i8254.h>
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| 46 | #include <arch/drivers/i8259.h>
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[f761f1eb] | 47 |
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| 48 | #include <arch/context.h>
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| 49 |
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| 50 | #include <config.h>
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| 51 |
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| 52 | #include <arch/interrupt.h>
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[ad36bd6] | 53 | #include <arch/asm.h>
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[e16e036a] | 54 | #include <genarch/acpi/acpi.h>
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[9c0a9b3] | 55 |
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| 56 | #include <arch/bios/bios.h>
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| 57 |
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[1e9a463] | 58 | #include <arch/mm/memory_init.h>
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[fcfac420] | 59 | #include <interrupt.h>
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[cea12e9] | 60 | #include <ddi/irq.h>
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[23d22eb] | 61 | #include <arch/debugger.h>
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[281b607] | 62 | #include <proc/thread.h>
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| 63 | #include <syscall/syscall.h>
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[41d33ac] | 64 | #include <console/console.h>
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[cea12e9] | 65 | #include <ddi/device.h>
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[ad36bd6] | 66 |
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[26678e5] | 67 | #ifdef CONFIG_SMP
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| 68 | #include <arch/smp/apic.h>
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| 69 | #endif
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| 70 |
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[f07bba5] | 71 | void arch_pre_mm_init(void)
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[f761f1eb] | 72 | {
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| 73 | pm_init();
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| 74 |
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| 75 | if (config.cpu_active == 1) {
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[cea12e9] | 76 | interrupt_init();
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[dba84ff] | 77 | bios_init();
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[5dce48b9] | 78 |
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[cea12e9] | 79 | /* PIC */
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| 80 | i8259_init();
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[f761f1eb] | 81 | }
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| 82 | }
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| 83 |
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[6ba143d] | 84 | void arch_post_mm_init(void)
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[7eade45] | 85 | {
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[425913b] | 86 | if (config.cpu_active == 1) {
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[cea12e9] | 87 | /* Initialize IRQ routing */
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| 88 | irq_init(IRQ_COUNT, IRQ_COUNT);
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| 89 |
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| 90 | /* hard clock */
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| 91 | i8254_init();
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[22cf454d] | 92 |
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| 93 | #ifdef CONFIG_FB
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[381465e] | 94 | if (vesa_present())
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| 95 | vesa_init();
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[22cf454d] | 96 | else
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| 97 | #endif
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[381465e] | 98 | ega_init(); /* video */
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[22cf454d] | 99 |
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[23d22eb] | 100 | /* Enable debugger */
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| 101 | debugger_init();
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[381465e] | 102 | /* Merge all memory zones to 1 big zone */
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| 103 | zone_merge_all();
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[babcb148] | 104 | }
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| 105 | }
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| 106 |
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[26678e5] | 107 | void arch_post_cpu_init()
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| 108 | {
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| 109 | #ifdef CONFIG_SMP
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| 110 | if (config.cpu_active > 1) {
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| 111 | l_apic_init();
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| 112 | l_apic_debug();
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| 113 | }
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| 114 | #endif
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| 115 | }
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| 116 |
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[7453929] | 117 | void arch_pre_smp_init(void)
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[babcb148] | 118 | {
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| 119 | if (config.cpu_active == 1) {
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[1e9a463] | 120 | memory_print_map();
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| 121 |
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[5f85c91] | 122 | #ifdef CONFIG_SMP
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[85bfdcc8] | 123 | acpi_init();
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[5f85c91] | 124 | #endif /* CONFIG_SMP */
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[425913b] | 125 | }
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[7eade45] | 126 | }
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| 127 |
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[7453929] | 128 | void arch_post_smp_init(void)
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| 129 | {
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[cea12e9] | 130 | /* keyboard controller */
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[16d71f41] | 131 | i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
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[7453929] | 132 | }
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| 133 |
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[f761f1eb] | 134 | void calibrate_delay_loop(void)
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| 135 | {
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| 136 | i8254_calibrate_delay_loop();
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[f701b236] | 137 | if (config.cpu_active == 1) {
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| 138 | /*
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| 139 | * This has to be done only on UP.
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| 140 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
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| 141 | */
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| 142 | i8254_normal_operation();
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| 143 | }
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[f761f1eb] | 144 | }
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[281b607] | 145 |
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[e1be3b6] | 146 | /** Set thread-local-storage pointer
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[281b607] | 147 | *
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[3b712407] | 148 | * TLS pointer is set in GS register. That means, the GS contains
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| 149 | * selector, and the descriptor->base is the correct address.
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[281b607] | 150 | */
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[7f1c620] | 151 | unative_t sys_tls_set(unative_t addr)
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[281b607] | 152 | {
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[a6d4ceb] | 153 | THREAD->arch.tls = addr;
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[281b607] | 154 | set_tls_desc(addr);
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| 155 |
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| 156 | return 0;
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| 157 | }
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[41d33ac] | 158 |
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| 159 | /** Acquire console back for kernel
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| 160 | *
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| 161 | */
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| 162 | void arch_grab_console(void)
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| 163 | {
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| 164 | i8042_grab();
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| 165 | }
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| 166 | /** Return console to userspace
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| 167 | *
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| 168 | */
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| 169 | void arch_release_console(void)
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| 170 | {
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| 171 | i8042_release();
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| 172 | }
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[b45c443] | 173 |
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[06e1e95] | 174 | /** @}
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[b45c443] | 175 | */
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