source: mainline/kernel/arch/ia32/src/ia32.c@ 3a9414e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3a9414e was af9dd1e, checked in by Jakub Jermar <jakub@…>, 10 years ago

Remove SYS_TLS_SET

  • Property mode set to 100644
File size: 6.1 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[deca67b]3 * Copyright (c) 2009 Jiri Svoboda
4 * Copyright (c) 2009 Martin Decky
[f761f1eb]5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * - Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * - Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * - The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
[06e1e95]31/** @addtogroup ia32
[b45c443]32 * @{
33 */
34/** @file
35 */
36
[f761f1eb]37#include <arch.h>
[d99c1d2]38#include <typedefs.h>
[d8db519]39#include <errno.h>
40#include <memstr.h>
[fcfac420]41#include <interrupt.h>
[41d33ac]42#include <console/console.h>
[d8db519]43#include <syscall/syscall.h>
[4c7257b]44#include <sysinfo/sysinfo.h>
[d8db519]45#include <arch/bios/bios.h>
[deca67b]46#include <arch/boot/boot.h>
[d8db519]47#include <arch/drivers/i8254.h>
48#include <arch/drivers/i8259.h>
49#include <genarch/acpi/acpi.h>
50#include <genarch/drivers/ega/ega.h>
51#include <genarch/drivers/i8042/i8042.h>
[3296df5]52#include <genarch/drivers/ns16550/ns16550.h>
[d8db519]53#include <genarch/drivers/legacy/ia32/io.h>
54#include <genarch/fb/bfb.h>
55#include <genarch/kbrd/kbrd.h>
[3296df5]56#include <genarch/srln/srln.h>
[d8db519]57#include <genarch/multiboot/multiboot.h>
58#include <genarch/multiboot/multiboot2.h>
[d6f9fff]59#include <arch/pm.h>
60#include <arch/vreg.h>
[ad36bd6]61
[26678e5]62#ifdef CONFIG_SMP
63#include <arch/smp/apic.h>
64#endif
65
[5d8d71e]66/** Perform ia32-specific initialization before main_bsp() is called.
[deca67b]67 *
[1f5c9c96]68 * @param signature Multiboot signature.
69 * @param info Multiboot information structure.
70 *
[deca67b]71 */
[1f5c9c96]72void arch_pre_main(uint32_t signature, void *info)
[deca67b]73{
[5d8d71e]74 /* Parse multiboot information obtained from the bootloader. */
[1f5c9c96]75 multiboot_info_parse(signature, (multiboot_info_t *) info);
76 multiboot2_info_parse(signature, (multiboot2_info_t *) info);
[deca67b]77
78#ifdef CONFIG_SMP
79 /* Copy AP bootstrap routines below 1 MB. */
80 memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
81 (size_t) &_hardcoded_unmapped_size);
82#endif
83}
84
[f07bba5]85void arch_pre_mm_init(void)
[f761f1eb]86{
87 pm_init();
88
89 if (config.cpu_active == 1) {
[cea12e9]90 interrupt_init();
[dba84ff]91 bios_init();
[5dce48b9]92
[cea12e9]93 /* PIC */
94 i8259_init();
[f761f1eb]95 }
96}
97
[6ba143d]98void arch_post_mm_init(void)
[7eade45]99{
[d6f9fff]100 vreg_init();
101
[425913b]102 if (config.cpu_active == 1) {
[cea12e9]103 /* Initialize IRQ routing */
104 irq_init(IRQ_COUNT, IRQ_COUNT);
105
106 /* hard clock */
107 i8254_init();
[ec944b1]108
[a71c158]109#if (defined(CONFIG_FB) || defined(CONFIG_EGA))
[1f5c9c96]110 bool bfb = false;
[a71c158]111#endif
112
[22cf454d]113#ifdef CONFIG_FB
[1f5c9c96]114 bfb = bfb_init();
[22cf454d]115#endif
[a71c158]116
[ec944b1]117#ifdef CONFIG_EGA
[1f5c9c96]118 if (!bfb) {
[a71c158]119 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
120 if (egadev)
121 stdout_wire(egadev);
122 }
[ec944b1]123#endif
[22cf454d]124
[381465e]125 /* Merge all memory zones to 1 big zone */
126 zone_merge_all();
[babcb148]127 }
[d6f9fff]128
[babcb148]129}
130
[49e6c6b4]131void arch_post_cpu_init(void)
[26678e5]132{
133#ifdef CONFIG_SMP
[49eb681]134 if (config.cpu_active > 1) {
[26678e5]135 l_apic_init();
136 l_apic_debug();
137 }
138#endif
139}
140
[7453929]141void arch_pre_smp_init(void)
[babcb148]142{
143 if (config.cpu_active == 1) {
[f619ec11]144#ifdef CONFIG_SMP
[85bfdcc8]145 acpi_init();
[f619ec11]146#endif /* CONFIG_SMP */
[425913b]147 }
[7eade45]148}
149
[7453929]150void arch_post_smp_init(void)
151{
[eff1f033]152 /* Currently the only supported platform for ia32 is 'pc'. */
153 static const char *platform = "pc";
154
155 sysinfo_set_item_data("platform", NULL, (void *) platform,
156 str_size(platform));
157
[2a34e4c]158#ifdef CONFIG_PC_KBD
[411b6a6]159 /*
[2a34e4c]160 * Initialize the i8042 controller. Then initialize the keyboard
161 * module and connect it to i8042. Enable keyboard interrupts.
[411b6a6]162 */
[c2417bc]163 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
164 if (i8042_instance) {
165 kbrd_instance_t *kbrd_instance = kbrd_init();
166 if (kbrd_instance) {
167 indev_t *sink = stdin_wire();
168 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
169 i8042_wire(i8042_instance, kbrd);
170 trap_virtual_enable_irqs(1 << IRQ_KBD);
[385a3d6]171 trap_virtual_enable_irqs(1 << IRQ_MOUSE);
[c2417bc]172 }
[2a34e4c]173 }
174#endif
[3296df5]175
[6bbe470]176#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
[3296df5]177 /*
[6bbe470]178 * Initialize the ns16550 controller.
[3296df5]179 */
[21b6307]180#ifdef CONFIG_NS16550_OUT
181 outdev_t *ns16550_out;
182 outdev_t **ns16550_out_ptr = &ns16550_out;
183#else
184 outdev_t **ns16550_out_ptr = NULL;
185#endif
[3296df5]186 ns16550_instance_t *ns16550_instance
[21b6307]187 = ns16550_init((ns16550_t *) NS16550_BASE, IRQ_NS16550, NULL, NULL,
188 ns16550_out_ptr);
[3296df5]189 if (ns16550_instance) {
[6bbe470]190#ifdef CONFIG_NS16550
[3296df5]191 srln_instance_t *srln_instance = srln_init();
192 if (srln_instance) {
193 indev_t *sink = stdin_wire();
194 indev_t *srln = srln_wire(srln_instance, sink);
195 ns16550_wire(ns16550_instance, srln);
[5030acad]196 trap_virtual_enable_irqs(1 << IRQ_NS16550);
[3296df5]197 }
198#endif
[6bbe470]199#ifdef CONFIG_NS16550_OUT
200 if (ns16550_out) {
201 stdout_wire(ns16550_out);
202 }
203#endif
[24b06199]204 }
205#endif
[849ed54]206
[acc7ce4]207 if (irqs_info != NULL)
208 sysinfo_set_item_val(irqs_info, NULL, true);
[7453929]209}
210
[f761f1eb]211void calibrate_delay_loop(void)
212{
213 i8254_calibrate_delay_loop();
[f701b236]214 if (config.cpu_active == 1) {
215 /*
216 * This has to be done only on UP.
217 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
218 */
219 i8254_normal_operation();
220 }
[f761f1eb]221}
[281b607]222
[6da1013f]223/** Construct function pointer
224 *
225 * @param fptr function pointer structure
226 * @param addr function address
227 * @param caller calling function address
228 *
229 * @return address of the function pointer
230 *
231 */
232void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
233{
234 return addr;
235}
236
[149d14e5]237void arch_reboot(void)
238{
239#ifdef CONFIG_PC_KBD
240 i8042_cpu_reset((i8042_t *) I8042_BASE);
241#endif
242}
243
[3a2f8aa]244void irq_initialize_arch(irq_t *irq)
245{
246 (void) irq;
247}
248
[06e1e95]249/** @}
[b45c443]250 */
Note: See TracBrowser for help on using the repository browser.