[0ca6faa] | 1 | /*
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[54ca3523] | 2 | * Copyright (C) 2005 Jakub Vana
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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[b45c443] | 27 | */
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| 28 |
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[27ab6a7] | 29 | /** @addtogroup ia32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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[54ca3523] | 33 | *
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| 34 | */
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[0ca6faa] | 35 |
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| 36 | #include <fpu_context.h>
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[79f1f38f] | 37 | #include <arch.h>
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| 38 | #include <cpu.h>
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| 39 |
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[3b05862f] | 40 | typedef void (*fpu_context_function)(fpu_context_t *fctx);
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| 41 |
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[27ab6a7] | 42 | static fpu_context_function fpu_save, fpu_restore;
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[3b05862f] | 43 |
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| 44 | static void fpu_context_f_save(fpu_context_t *fctx)
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[0ca6faa] | 45 | {
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[005384ad] | 46 | __asm__ volatile (
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[e515167d] | 47 | "fnsave %0"
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[005384ad] | 48 | : "=m"(*fctx)
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[e515167d] | 49 | );
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[0ca6faa] | 50 | }
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| 51 |
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[3b05862f] | 52 | static void fpu_context_f_restore(fpu_context_t *fctx)
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[0ca6faa] | 53 | {
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[005384ad] | 54 | __asm__ volatile (
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[e515167d] | 55 | "frstor %0"
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[005384ad] | 56 | : "=m"(*fctx)
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[e515167d] | 57 | );
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[6a27d63] | 58 | }
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| 59 |
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[3b05862f] | 60 | static void fpu_context_fx_save(fpu_context_t *fctx)
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| 61 | {
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| 62 | __asm__ volatile (
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| 63 | "fxsave %0"
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| 64 | : "=m"(*fctx)
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| 65 | );
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| 66 | }
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| 67 |
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| 68 | static void fpu_context_fx_restore(fpu_context_t *fctx)
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| 69 | {
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| 70 | __asm__ volatile (
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| 71 | "fxrstor %0"
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| 72 | : "=m"(*fctx)
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| 73 | );
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| 74 | }
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| 75 |
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| 76 | /*
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| 77 | Setup using fxsr instruction
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| 78 | */
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| 79 | void fpu_fxsr(void)
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| 80 | {
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| 81 | fpu_save=fpu_context_fx_save;
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| 82 | fpu_restore=fpu_context_fx_restore;
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| 83 | }
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| 84 | /*
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| 85 | Setup using not fxsr instruction
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| 86 | */
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| 87 | void fpu_fsr(void)
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| 88 | {
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[27ab6a7] | 89 | fpu_save = fpu_context_f_save;
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| 90 | fpu_restore = fpu_context_f_restore;
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[3b05862f] | 91 | }
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| 92 |
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| 93 | void fpu_context_save(fpu_context_t *fctx)
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| 94 | {
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| 95 | fpu_save(fctx);
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| 96 | }
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| 97 |
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| 98 | void fpu_context_restore(fpu_context_t *fctx)
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| 99 | {
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| 100 | fpu_restore(fctx);
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| 101 | }
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| 102 |
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[f76fed4] | 103 | void fpu_init()
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[6a27d63] | 104 | {
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[27ab6a7] | 105 | uint32_t help0 = 0, help1 = 0;
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[005384ad] | 106 | __asm__ volatile (
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[3b05862f] | 107 | "fninit;\n"
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| 108 | "stmxcsr %0\n"
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| 109 | "mov %0,%1;\n"
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| 110 | "or %2,%1;\n"
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| 111 | "mov %1,%0;\n"
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| 112 | "ldmxcsr %0;\n"
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[27ab6a7] | 113 | : "+m" (help0), "+r" (help1)
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| 114 | : "i" (0x1f80)
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[54ca3523] | 115 | );
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[0ca6faa] | 116 | }
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[b45c443] | 117 |
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[27ab6a7] | 118 | /** @}
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[b45c443] | 119 | */
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