source: mainline/kernel/arch/ia32/src/drivers/i8259.c@ 306f0de

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 306f0de was acc7ce4, checked in by Martin Decky <martin@…>, 15 years ago

uspace interrupt controller drivers for i8259 and APIC (non-functional yet)
convert NE2000 driver to use these drivers (not enabling the IRQ in kernel), this solves the "spurious interrupt" issue
(however, on SMP machines this renders the driver unusable for now since the APIC driver does not do anything yet)

  • Property mode set to 100644
File size: 3.8 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/**
33 * @file
34 * @brief PIC driver.
35 *
36 * Programmable Interrupt Controller for UP systems based on i8259 chip.
37 */
38
39#include <arch/drivers/i8259.h>
40#include <cpu.h>
41#include <typedefs.h>
42#include <arch/asm.h>
43#include <arch.h>
44#include <print.h>
45#include <interrupt.h>
46
47static void pic_spurious(unsigned int n, istate_t *istate);
48
49void i8259_init(void)
50{
51 /* ICW1: this is ICW1, ICW4 to follow */
52 pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
53
54 /* ICW2: IRQ 0 maps to INT IRQBASE */
55 pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
56
57 /* ICW3: pic1 using IRQ IRQ_PIC1 */
58 pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
59
60 /* ICW4: i8086 mode */
61 pio_write_8(PIC_PIC0PORT2, 1);
62
63 /* ICW1: ICW1, ICW4 to follow */
64 pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
65
66 /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
67 pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
68
69 /* ICW3: pic1 is known as IRQ_PIC1 */
70 pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
71
72 /* ICW4: i8086 mode */
73 pio_write_8(PIC_PIC1PORT2, 1);
74
75 /*
76 * Register interrupt handler for the PIC spurious interrupt.
77 */
78 exc_register(VECTOR_PIC_SPUR, "pic_spurious", false,
79 (iroutine_t) pic_spurious);
80
81 /*
82 * Set the enable/disable IRQs handlers.
83 * Set the End-of-Interrupt handler.
84 */
85 enable_irqs_function = pic_enable_irqs;
86 disable_irqs_function = pic_disable_irqs;
87 eoi_function = pic_eoi;
88 irqs_info = "i8259";
89
90 pic_disable_irqs(0xffff); /* disable all irq's */
91 pic_enable_irqs(1 << IRQ_PIC1); /* but enable pic1 */
92}
93
94void pic_enable_irqs(uint16_t irqmask)
95{
96 uint8_t x;
97
98 if (irqmask & 0xff) {
99 x = pio_read_8(PIC_PIC0PORT2);
100 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
101 }
102 if (irqmask >> 8) {
103 x = pio_read_8(PIC_PIC1PORT2);
104 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
105 }
106}
107
108void pic_disable_irqs(uint16_t irqmask)
109{
110 uint8_t x;
111
112 if (irqmask & 0xff) {
113 x = pio_read_8(PIC_PIC0PORT2);
114 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
115 }
116 if (irqmask >> 8) {
117 x = pio_read_8(PIC_PIC1PORT2);
118 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
119 }
120}
121
122void pic_eoi(void)
123{
124 pio_write_8((ioport8_t *) 0x20, 0x20);
125 pio_write_8((ioport8_t *) 0xa0, 0x20);
126}
127
128void pic_spurious(unsigned int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
129{
130#ifdef CONFIG_DEBUG
131 printf("cpu%u: PIC spurious interrupt\n", CPU->id);
132#endif
133}
134
135/** @}
136 */
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