source: mainline/kernel/arch/ia32/src/context.S@ 15d0046

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 15d0046 was 5eae56a, checked in by Jakub Jermar <jakub@…>, 11 years ago

Autogenerate ia32 kernel context_t and its offsets.

  • Property mode set to 100644
File size: 2.9 KB
RevLine 
[f761f1eb]1#
[df4ed85]2# Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[5eae56a]29#include <arch/context_struct.h>
[1aede82]30
[f761f1eb]31.text
32
[4b2c872d]33.global context_save_arch
34.global context_restore_arch
[aa4e8d7]35
[da585a52]36
37## Save current CPU context
38#
[4b2c872d]39# Save CPU context to the context_t variable
[da585a52]40# pointed by the 1st argument. Returns 1 in EAX.
[f761f1eb]41#
[4b2c872d]42context_save_arch:
[5eae56a]43 movl 0(%esp), %eax # save pc value into eax
44 movl 4(%esp), %edx # address of the context variable to save context to
[f761f1eb]45
[5eae56a]46 # save registers to given structure
47 movl %esp, CONTEXT_OFFSET_SP(%edx) # %esp -> ctx->sp
48 movl %eax, CONTEXT_OFFSET_PC(%edx) # %eip -> ctx->pc
49 movl %ebx, CONTEXT_OFFSET_EBX(%edx) # %ebx -> ctx->ebx
50 movl %esi, CONTEXT_OFFSET_ESI(%edx) # %esi -> ctx->esi
51 movl %edi, CONTEXT_OFFSET_EDI(%edx) # %edi -> ctx->edi
52 movl %ebp, CONTEXT_OFFSET_EBP(%edx) # %ebp -> ctx->ebp
[76cec1e]53
[5eae56a]54 xorl %eax, %eax # context_save returns 1
[f761f1eb]55 incl %eax
56 ret
[da585a52]57
58
[4b2c872d]59## Restore saved CPU context
[f761f1eb]60#
[4b2c872d]61# Restore CPU context from context_t variable
[da585a52]62# pointed by the 1st argument. Returns 0 in EAX.
[76cec1e]63#
[4b2c872d]64context_restore_arch:
[5eae56a]65 movl 4(%esp), %eax # address of the context variable to restore context from
[f761f1eb]66
[5eae56a]67 # restore registers from given structure
68 movl CONTEXT_OFFSET_SP(%eax), %esp # ctx->sp -> %esp
69 movl CONTEXT_OFFSET_PC(%eax), %edx # ctx->pc -> \pc
70 movl CONTEXT_OFFSET_EBX(%eax), %ebx # ctx->ebx -> %ebx
71 movl CONTEXT_OFFSET_ESI(%eax), %esi # ctx->esi -> %esi
72 movl CONTEXT_OFFSET_EDI(%eax), %edi # ctx->edi -> %edi
73 movl CONTEXT_OFFSET_EBP(%eax), %ebp # ctx->ebp -> %ebp
[1aede82]74
[5eae56a]75 movl %edx, 0(%esp) # put saved pc on stack
76 xorl %eax, %eax # context_restore returns 0
[f761f1eb]77 ret
[5eae56a]78
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