source: mainline/kernel/arch/ia32/src/asm.S@ f2ef7fd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f2ef7fd was f2ef7fd, checked in by Jakub Jermar <jakub@…>, 17 years ago

Support for SYSENTER on ia32.

  • Property mode set to 100644
File size: 7.4 KB
Line 
1#
2# Copyright (c) 2001-2004 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29## very low and hardware-level functions
30
31# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error
32# word and 1 means interrupt with error word
33#define ERROR_WORD_INTERRUPT_LIST 0x00027d00
34
35.text
36
37.global paging_on
38.global enable_l_apic_in_msr
39.global interrupt_handlers
40.global memsetb
41.global memsetw
42.global memcpy
43.global memcpy_from_uspace
44.global memcpy_from_uspace_failover_address
45.global memcpy_to_uspace
46.global memcpy_to_uspace_failover_address
47
48
49# Wrapper for generic memsetb
50memsetb:
51 jmp _memsetb
52
53# Wrapper for generic memsetw
54memsetw:
55 jmp _memsetw
56
57
58#define MEMCPY_DST 4
59#define MEMCPY_SRC 8
60#define MEMCPY_SIZE 12
61
62/** Copy memory to/from userspace.
63 *
64 * This is almost conventional memcpy().
65 * The difference is that there is a failover part
66 * to where control is returned from a page fault
67 * if the page fault occurs during copy_from_uspace()
68 * or copy_to_uspace().
69 *
70 * @param MEMCPY_DST(%esp) Destination address.
71 * @param MEMCPY_SRC(%esp) Source address.
72 * @param MEMCPY_SIZE(%esp) Size.
73 *
74 * @return MEMCPY_DST(%esp) on success and 0 on failure.
75 */
76memcpy:
77memcpy_from_uspace:
78memcpy_to_uspace:
79 movl %edi, %edx /* save %edi */
80 movl %esi, %eax /* save %esi */
81
82 movl MEMCPY_SIZE(%esp), %ecx
83 shrl $2, %ecx /* size / 4 */
84
85 movl MEMCPY_DST(%esp), %edi
86 movl MEMCPY_SRC(%esp), %esi
87
88 rep movsl /* copy whole words */
89
90 movl MEMCPY_SIZE(%esp), %ecx
91 andl $3, %ecx /* size % 4 */
92 jz 0f
93
94 rep movsb /* copy the rest byte by byte */
95
960:
97 movl %edx, %edi
98 movl %eax, %esi
99 movl MEMCPY_DST(%esp), %eax /* MEMCPY_DST(%esp), success */
100 ret
101
102/*
103 * We got here from as_page_fault() after the memory operations
104 * above had caused a page fault.
105 */
106memcpy_from_uspace_failover_address:
107memcpy_to_uspace_failover_address:
108 movl %edx, %edi
109 movl %eax, %esi
110 xorl %eax, %eax /* return 0, failure */
111 ret
112
113## Turn paging on
114#
115# Enable paging and write-back caching in CR0.
116#
117paging_on:
118 movl %cr0, %edx
119 orl $(1 << 31), %edx # paging on
120 # clear Cache Disable and not Write Though
121 andl $~((1 << 30) | (1 << 29)), %edx
122 movl %edx,%cr0
123 jmp 0f
1240:
125 ret
126
127
128## Enable local APIC
129#
130# Enable local APIC in MSR.
131#
132enable_l_apic_in_msr:
133 movl $0x1b, %ecx
134 rdmsr
135 orl $(1 << 11), %eax
136 orl $(0xfee00000), %eax
137 wrmsr
138 ret
139
140# Clear nested flag
141# overwrites %ecx
142.macro CLEAR_NT_FLAG
143 pushfl
144 pop %ecx
145 and $0xffffbfff, %ecx
146 push %ecx
147 popfl
148.endm
149
150/*
151 * The SYSENTER syscall mechanism can be used for syscalls with
152 * four or fewer arguments. To pass these four arguments, we
153 * use four registers: EDX, ECX, EBX, ESI. The syscall number
154 * is passed in EAX. We use EDI to remember the return address
155 * and EBP to remember the stack. The INT-based syscall mechanism
156 * can actually handle six arguments plus the syscall number
157 * entirely in registers.
158 */
159.global sysenter_handler
160sysenter_handler:
161 pushl %ebp # remember user stack
162 pushl %edi # remember return user address
163
164 pushl %gs # remember TLS
165
166 pushl %eax # syscall number
167 subl $8, %esp # unused sixth and fifth argument
168 pushl %esi # fourth argument
169 pushl %ebx # third argument
170 pushl %ecx # second argument
171 pushl %edx # first argument
172
173 movw $16, %ax
174 movw %ax, %ds
175 movw %ax, %es
176
177 cld
178 call syscall_handler
179 addl $28, %esp # remove arguments from stack
180
181 pop %gs # restore TLS
182
183 pop %edx # prepare return EIP for SYSEXIT
184 pop %ecx # prepare userspace ESP for SYSEXIT
185
186 sysexit # return to userspace
187
188
189## Declare interrupt handlers
190#
191# Declare interrupt handlers for n interrupt
192# vectors starting at vector i.
193#
194# The handlers setup data segment registers
195# and call exc_dispatch().
196#
197#define INTERRUPT_ALIGN 64
198.macro handler i n
199
200.ifeq \i - 0x30 # Syscall handler
201 pushl %ds
202 pushl %es
203 pushl %fs
204 pushl %gs
205
206 #
207 # Push syscall arguments onto the stack
208 #
209 # NOTE: The idea behind the order of arguments passed in registers is to
210 # use all scratch registers first and preserved registers next.
211 # An optimized libc syscall wrapper can make use of this setup.
212 #
213 pushl %eax
214 pushl %ebp
215 pushl %edi
216 pushl %esi
217 pushl %ebx
218 pushl %ecx
219 pushl %edx
220
221 # we must fill the data segment registers
222 movw $16, %ax
223 movw %ax, %ds
224 movw %ax, %es
225
226 cld
227 sti
228 # syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax)
229 call syscall_handler
230 cli
231 addl $28, %esp # clean-up of parameters
232
233 popl %gs
234 popl %fs
235 popl %es
236 popl %ds
237
238 CLEAR_NT_FLAG
239 iret
240.else
241 /*
242 * This macro distinguishes between two versions of ia32 exceptions.
243 * One version has error word and the other does not have it.
244 * The latter version fakes the error word on the stack so that the
245 * handlers and istate_t can be the same for both types.
246 */
247 .iflt \i - 32
248 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
249 /*
250 * With error word, do nothing
251 */
252 .else
253 /*
254 * Version without error word,
255 */
256 subl $4, %esp
257 .endif
258 .else
259 /*
260 * Version without error word,
261 */
262 subl $4, %esp
263 .endif
264
265 pushl %ds
266 pushl %es
267 pushl %fs
268 pushl %gs
269
270#ifdef CONFIG_DEBUG_ALLREGS
271 pushl %ebx
272 pushl %ebp
273 pushl %edi
274 pushl %esi
275#else
276 subl $16, %esp
277#endif
278 pushl %edx
279 pushl %ecx
280 pushl %eax
281
282 # we must fill the data segment registers
283 movw $16, %ax
284 movw %ax, %ds
285 movw %ax, %es
286
287 cld
288
289 pushl %esp # *istate
290 pushl $(\i) # intnum
291 call exc_dispatch # excdispatch(intnum, *istate)
292 addl $8, %esp # Clear arguments from stack
293
294 CLEAR_NT_FLAG # Modifies %ecx
295
296 popl %eax
297 popl %ecx
298 popl %edx
299#ifdef CONFIG_DEBUG_ALLREGS
300 popl %esi
301 popl %edi
302 popl %ebp
303 popl %ebx
304#else
305 addl $16, %esp
306#endif
307
308 popl %gs
309 popl %fs
310 popl %es
311 popl %ds
312
313 addl $4, %esp # Skip error word, no matter whether real or fake.
314 iret
315.endif
316
317 .align INTERRUPT_ALIGN
318 .if (\n- \i) - 1
319 handler "(\i + 1)", \n
320 .endif
321.endm
322
323# keep in sync with pm.h !!!
324IDT_ITEMS = 64
325.align INTERRUPT_ALIGN
326interrupt_handlers:
327h_start:
328 handler 0 IDT_ITEMS
329h_end:
330
331.data
332.global interrupt_handler_size
333
334interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS
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